Changeset 168 for branches/virtcpu fixed int/UMachine.pas

Timestamp:

Oct 16, 2018, 11:03:59 AM (6 years ago)

Author:

chronos

Message:

• Added: Show CPU tick count.
• Added: Show IP register value.
• Modified: Condition instructions store result to R1 register rather then to condition boolean variable.
• Modified: Shorter InstructionWriter method names.

File:

• branches/virtcpu fixed int/UMachine.pas (modified) (9 diffs)

branches/virtcpu fixed int/UMachine.pas

@@ -5 +5 @@
 {$DEFINE EXT_ARITHMETIC}
 {$DEFINE EXT_CONDITIONAL}
-//{$DEFINE EXT_LOGICAL}
-//{$DEFINE EXT_STACK}
-//{$DEFINE EXT_SUBROUTINE}
-//{$DEFINE EXT_ROTATION}
-//{$DEFINE EXT_MULTIPLICATION}
-//{$DEFINE EXT_SHIFT}
-//{$DEFINE EXT_BLOCK}
-//{$DEFINE EXT_GENERAL}
-//{$DEFINE EXT_BIT}
-//{$DEFINE EXT_REL_JUMP}
+{$DEFINE EXT_LOGICAL}
+{$DEFINE EXT_STACK}
+{$DEFINE EXT_SUBROUTINE}
+{$DEFINE EXT_ROTATION}
+{$DEFINE EXT_MULTIPLICATION}
+{$DEFINE EXT_SHIFT}
+{$DEFINE EXT_BLOCK}
+{$DEFINE EXT_GENERAL}
+{$DEFINE EXT_BIT}
+{$DEFINE EXT_REL_JUMP}
 
 // Extension dependencies
@@ -50 +50 @@
     {$IFDEF EXT_STACK}opPush, opPop,{$ENDIF}
     {$IFDEF EXT_CONDITIONAL}
-    {$IFDEF EXT_REL_JUMP}opJumpRelCond,{$ENDIF}
-    opJumpCond, opTestEqual, opTestNotEqual, opTestLess,
+    {$IFDEF EXT_REL_JUMP}opJumpRelZero, opJumpRelNotZero,{$ENDIF}
+    opJumpZero, opJumpNotZero, opTestEqual, opTestNotEqual, opTestLess,
     opTestLessEqual, opTestGreater, opTestGreaterEqual,
     {$ENDIF}
@@ -97 +97 @@
     procedure OpcodeTestLessEqual;
     procedure OpcodeTestLess;
-    procedure OpcodeJumpCond;
+    procedure OpcodeJumpCondNotZero;
+    procedure OpcodeJumpCondZero;
     {$IFDEF EXT_REL_JUMP}
-    procedure OpcodeJumpRelCond;
+    procedure OpcodeJumpRelCondNotZero;
+    procedure OpcodeJumpRelCondZero;
     {$ENDIF}
     {$ENDIF}
@@ -141 +143 @@
     Registers: array of T;
     IP: T;
-    {$IFDEF EXT_CONDITIONAL}
-    Condition: Boolean;
-    {$ENDIF}
     {$IFDEF EXT_STACK}
     SP: T;
@@ -149 +148 @@
     Memory: array of T;
     Terminated: Boolean;
+    Ticks: Integer;
     procedure Start;
     procedure Stop;
@@ -255 +255 @@
 {$IFDEF EXT_CONDITIONAL}
 procedure TCPU.OpcodeTestEqual;
-begin
-  Condition := ReadNext = ReadNext;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] = Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
 end;
 
 procedure TCPU.OpcodeTestNotEqual;
-begin
-  Condition := ReadNext <> ReadNext;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] <> Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
 end;
 
 procedure TCPU.OpcodeTestGreatEqual;
-begin
-  Condition := ReadNext >= ReadNext;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] >= Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
 end;
 
 procedure TCPU.OpcodeTestGreat;
-begin
-  Condition := ReadNext > ReadNext;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] > Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
 end;
 
 procedure TCPU.OpcodeTestLessEqual;
-begin
-  Condition := ReadNext <= ReadNext;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] <= Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
 end;
 
 procedure TCPU.OpcodeTestLess;
-begin
-  Condition := ReadNext < ReadNext;
-end;
-
-procedure TCPU.OpcodeJumpCond;
-begin
-  if Condition then IP := ReadNext;
-end;
-
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] < Registers[P2] then Registers[P1] := 1
+    else Registers[P1] := 0;
+end;
+
+procedure TCPU.OpcodeJumpCondNotZero;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] <> 0 then IP := P2;
+end;
+
+procedure TCPU.OpcodeJumpCondZero;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if Registers[P1] = 0 then IP := P2;
+end;
 
 {$IFDEF EXT_REL_JUMP}
-procedure TCPU.OpcodeJumpRelCond;
-begin
-  if Condition then IP := IP + ReadNext;
+procedure TCPU.OpcodeJumpRelCondZero;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if P1 = 0 then IP := IP + P2;
+end;
+
+procedure TCPU.OpcodeJumpRelCondNotZero;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  if P1 <> 0 then IP := IP + P2;
 end;
 {$ENDIF}
@@ -503 +558 @@
   Terminated := False;
   IP := 0;
+  Ticks := 0;
   {$IFDEF EXT_STACK}
   SP := Length(Memory);
@@ -511 +567 @@
       OpcodeHandlers[TOpcode(Opcode)]
       else raise Exception.Create(Format('Unsupported instruction %d', [Opcode]));
+    Inc(Ticks);
   end;
 end;
@@ -575 +632 @@
   {$ENDIF}
   {$IFDEF EXT_CONDITIONAL}
-  OpcodeHandlers[opJumpCond] := OpcodeJumpCond;
+  OpcodeHandlers[opJumpZero] := OpcodeJumpCondZero;
+  OpcodeHandlers[opJumpNotZero] := OpcodeJumpCondNotZero;
   {$IFDEF EXT_REL_JUMP}
-  OpcodeHandlers[opJumpRelCond] := OpcodeJumpRelCond;
+  OpcodeHandlers[opJumpRelZero] := OpcodeJumpRelCondZero;
+  OpcodeHandlers[opJumpRelNotZero] := OpcodeJumpRelCondNotZero;
   {$ENDIF}
   OpcodeHandlers[opTestEqual] := OpcodeTestEqual;