Changeset 183 for branches/virtualcpu4
- Timestamp:
- Apr 24, 2019, 5:04:53 PM (6 years ago)
- Location:
- branches/virtualcpu4
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
branches/virtualcpu4
- Property svn:ignore
-
old new 5 5 *.res 6 6 heaptrclog.trc 7 *.dbg
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- Property svn:ignore
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branches/virtualcpu4/Forms/UFormMain.lfm
r181 r183 1 1 object FormMain: TFormMain 2 2 Left = 780 3 Height = 2 693 Height = 224 4 4 Top = 527 5 Width = 6595 Width = 549 6 6 Caption = 'VirtCpu4' 7 ClientHeight = 2 698 ClientWidth = 6599 DesignTimePPI = 1 447 ClientHeight = 224 8 ClientWidth = 549 9 DesignTimePPI = 120 10 10 OnCreate = FormCreate 11 11 OnDestroy = FormDestroy 12 12 OnShow = FormShow 13 LCLVersion = '2.0. 0.4'13 LCLVersion = '2.0.2.0' 14 14 object ButtonStart: TButton 15 Left = 22916 Height = 3 717 Top = 1 718 Width = 11315 Left = 191 16 Height = 31 17 Top = 14 18 Width = 94 19 19 Caption = 'Start' 20 20 OnClick = ButtonStartClick … … 23 23 end 24 24 object ButtonStop: TButton 25 Left = 22926 Height = 3 727 Top = 6528 Width = 11325 Left = 191 26 Height = 31 27 Top = 54 28 Width = 94 29 29 Caption = 'Stop' 30 30 OnClick = ButtonStopClick … … 33 33 end 34 34 object ButtonDisassembler: TButton 35 Left = 3 7136 Height = 3 837 Top = 1 738 Width = 1 8535 Left = 309 36 Height = 32 37 Top = 14 38 Width = 154 39 39 Caption = 'Disassembler' 40 40 OnClick = ButtonDisassemblerClick 41 ParentFont = False 41 42 TabOrder = 2 42 43 end 43 44 object ButtonMemory: TButton 44 Left = 3 7145 Height = 3 846 Top = 6447 Width = 1 8545 Left = 309 46 Height = 32 47 Top = 53 48 Width = 154 48 49 Caption = 'Memory' 49 50 OnClick = ButtonMemoryClick 51 ParentFont = False 50 52 TabOrder = 3 51 53 end 52 54 object ButtonCpuState: TButton 53 Left = 3 7154 Height = 3 855 Top = 11156 Width = 1 8555 Left = 309 56 Height = 32 57 Top = 92 58 Width = 154 57 59 Caption = 'CPU state' 58 60 OnClick = ButtonCpuStateClick 61 ParentFont = False 59 62 TabOrder = 4 60 63 end 61 64 object ButtonScreen: TButton 62 Left = 2 463 Height = 3 864 Top = 1 665 Width = 1 8565 Left = 20 66 Height = 32 67 Top = 13 68 Width = 154 66 69 Caption = 'Screen' 67 70 OnClick = ButtonScreenClick 71 ParentFont = False 68 72 TabOrder = 5 69 73 end 70 74 object ButtonConsole: TButton 71 Left = 2 472 Height = 3 873 Top = 6474 Width = 1 8575 Left = 20 76 Height = 32 77 Top = 53 78 Width = 154 75 79 Caption = 'Console' 76 80 OnClick = ButtonConsoleClick 81 ParentFont = False 77 82 TabOrder = 6 78 83 end -
branches/virtualcpu4/Forms/UFormMain.pas
r182 r183 144 144 with InstructionWriter do begin 145 145 Init; 146 DataPrefix32; Loadi(R1, $12345678); 147 DataPrefix8; Loadi(R1, $ff); 148 DataPrefix8; Convert(R1); 149 146 150 LabelMain := $100; 147 151 Jump(LabelMain); -
branches/virtualcpu4/UCpu.pas
r182 r183 15 15 opDataPrefix32, opDataPrefix64, opDataSize, opAddrSize, opTest, opAnd, opOr, 16 16 opXor, opLddr, opLdir, opMul, opDiv, opMod, opAddrPrefix8, opAddrPrefix16, 17 opAddrPrefix32, opAddrPrefix64 );17 opAddrPrefix32, opAddrPrefix64, opConvert); 18 18 19 19 TAddressSigned = Int64; … … 51 51 Z: Boolean; 52 52 Thread: TCpuThread; 53 procedure InstConvert; 53 54 procedure InstNop; 54 55 procedure InstHalt; … … 197 198 (Name: 'AP16'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True), 198 199 (Name: 'AP32'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True), 199 (Name: 'AP64'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True) 200 (Name: 'AP64'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True), 201 (Name: 'CON'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: True) 200 202 ); 201 203 … … 770 772 end; 771 773 end; 774 775 procedure TCpu.InstConvert; 776 var 777 R: TRegIndex; 778 begin 779 R := Read8; 780 case AddrSize of 781 bw8: case DataSize of 782 bw8: Registers[R].B := Registers[R].B; 783 bw16: Registers[R].B := Registers[R].W; 784 bw32: Registers[R].B := Registers[R].D; 785 bw64: Registers[R].B := Registers[R].Q; 786 end; 787 bw16: case DataSize of 788 bw8: Registers[R].W := Registers[R].B; 789 bw16: Registers[R].W := Registers[R].W; 790 bw32: Registers[R].W := Registers[R].D; 791 bw64: Registers[R].W := Registers[R].Q; 792 end; 793 bw32: case DataSize of 794 bw8: Registers[R].D := Registers[R].B; 795 bw16: Registers[R].D := Registers[R].W; 796 bw32: Registers[R].D := Registers[R].D; 797 bw64: Registers[R].D := Registers[R].Q; 798 end; 799 bw64: case DataSize of 800 bw8: Registers[R].Q := Registers[R].B; 801 bw16: Registers[R].Q := Registers[R].W; 802 bw32: Registers[R].Q := Registers[R].D; 803 bw64: Registers[R].Q := Registers[R].Q; 804 end; 805 end; 806 end; 807 772 808 773 809 procedure TCpu.InstLddr; … … 1088 1124 Instructions[opDataPrefix16] := InstDataPrefix16; 1089 1125 Instructions[opDataPrefix32] := InstDataPrefix32; 1090 Instructions[opDataPrefix 32] := InstDataPrefix64;1126 Instructions[opDataPrefix64] := InstDataPrefix64; 1091 1127 Instructions[opAddrSize] := InstAddrSize; 1092 1128 Instructions[opAddrPrefix8] := InstAddrPrefix8; 1093 1129 Instructions[opAddrPrefix16] := InstAddrPrefix16; 1094 1130 Instructions[opAddrPrefix32] := InstAddrPrefix32; 1095 Instructions[opAddrPrefix 32] := InstAddrPrefix64;1131 Instructions[opAddrPrefix64] := InstAddrPrefix64; 1096 1132 Instructions[opTest] := InstTest; 1097 1133 Instructions[opAnd] := InstAnd; … … 1103 1139 Instructions[opDiv] := InstDiv; 1104 1140 Instructions[opMod] := InstMod; 1141 Instructions[opConvert] := InstConvert; 1105 1142 end; 1106 1143 -
branches/virtualcpu4/UDisassembler.pas
r182 r183 56 56 Prefix := False; 57 57 Opcode := Read8; 58 if Opcode < Integer(High(TOpcode)) then begin58 if Opcode <= Integer(High(TOpcode)) then begin 59 59 Prefix := OpcodeDef[TOpcode(Opcode)].Prefix; 60 60 case TOpcode(Opcode) of -
branches/virtualcpu4/UInstructionWriter.pas
r182 r183 48 48 procedure Call(Addr: QWord); 49 49 procedure Return; 50 procedure Convert(Reg: TRegIndex); 50 51 procedure DataPrefix8; 51 52 procedure DataPrefix16; … … 195 196 end; 196 197 198 procedure TInstructionWriter.Convert(Reg: TRegIndex); 199 begin 200 PrefixBegin; 201 Write8(Byte(opConvert)); 202 Write8(Reg); 203 PrefixEnd; 204 end; 205 197 206 procedure TInstructionWriter.DataPrefix8; 198 207 begin -
branches/virtualcpu4/virtucpu4.lpi
r182 r183 180 180 <Debugging> 181 181 <UseHeaptrc Value="True"/> 182 <UseExternalDbgSyms Value="True"/> 182 183 </Debugging> 183 184 <Options>
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