Changeset 165 for branches/virtcpu fixed int/UMachine.pas

Timestamp:

Aug 9, 2018, 9:45:07 AM (6 years ago)

Author:

chronos

Message:

• Added: More processor instructions.

Location:

branches/virtcpu fixed int

Files:

• . (modified) (1 prop)
• UMachine.pas (modified) (12 diffs)

branches/virtcpu fixed int

@@ -3 +3 @@
 virtcpu.lps
 virtcpu.res
+*.dbg

@@ -3 +3 @@
 virtcpu.lps
 virtcpu.res
+*.dbg

branches/virtcpu fixed int/UMachine.pas

@@ -5 +5 @@
 {$DEFINE EXT_ARITHMETIC}
 {$DEFINE EXT_CONDITIONAL}
-//{$DEFINE EXT_LOGICAL}
+{$DEFINE EXT_LOGICAL}
 {$DEFINE EXT_STACK}
 {$DEFINE EXT_SUBROUTINE}
-//{$DEFINE EXT_SHIFT}
+{$DEFINE EXT_SHIFT}
 //{$DEFINE EXT_BLOCK}
 {$DEFINE EXT_GENERAL}
 //{$DEFINE EXT_BIT}
+//{$DEFINE EXT_REL_JUMP}
 
 // Extension dependencies
@@ -30 +31 @@
 
   TOpcode = (opNop, opLoad, opHalt, opLoadConst, opLoadMem, opStoreMem, opNeg,
-    opJump, opJumpRel, opCall, opCallRel, opRet, opInput,
-    opOutput, opInc, opDec, opAdd, opSub, opExchg,
-    {$IFDEF EXT_STACK}
-    opPush, opPop,
-    {$ENDIF}
+    opJump, {$IFDEF EXT_REL_JUMP}opJumpRel,{$ENDIF}
+    opInc, opDec,
+    {$IFDEF EXT_ARITHMETIC}opAdd, opSub,{$ENDIF}
+    {$IFDEF EXT_IO}opInput, opOutput,{$ENDIF}
+    {$IFDEF EXT_SUBROUTINE}opCall,
+    {$IFDEF EXT_REL_JUMP}opCallRel,{$ENDIF}
+    opRet,{$ENDIF}
+    {$IFDEF EXT_GENERAL}opExchg,{$ENDIF}
+    {$IFDEF EXT_LOGICAL}opAnd, opOr, opXor,{$ENDIF}
+    {$IFDEF EXT_SHIFT}opShl, opShr,{$ENDIF}
+    {$IFDEF EXT_STACK}opPush, opPop,{$ENDIF}
     {$IFDEF EXT_CONDITIONAL}
     opJumpRelCond, opJumpCond, opTestEqual, opTestNotEqual, opTestLess,
@@ -53 +60 @@
     OpcodeHandlers: array[TOpcode] of TOpcodeHandler;
     function ReadNext: T; inline;
+    procedure OpcodeNop;
     procedure OpcodeHalt;
-    procedure OpcodeNop;
     procedure OpcodeLoad;
     procedure OpcodeLoadConst;
+    procedure OpcodeJump;
+    procedure OpcodeJumpRel;
+    procedure OpcodeNeg;
+    procedure OpcodeInc;
+    procedure OpcodeDec;
     {$IFDEF EXT_MEMORY}
     procedure OpcodeLoadMem;
     procedure OpcodeStoreMem;
     {$ENDIF}
-    procedure OpcodeNeg;
     {$IFDEF EXT_GENERAL}
     procedure OpcodeExchange;
     {$ENDIF}
-    procedure OpcodeJump;
-    procedure OpcodeJumpRel;
     {$IFDEF EXT_CONDITIONAL}
     procedure OpcodeTestEqual;
@@ -75 +84 @@
     procedure OpcodeTestLess;
     procedure OpcodeJumpCond;
+    {$IFDEF EXT_REL_JUMP}
     procedure OpcodeJumpRelCond;
+    {$ENDIF}
+    {$ENDIF}
+    {$IFDEF EXT_SHIFT}
+    procedure OpcodeShl;
+    procedure OpcodeShr;
+    {$ENDIF}
+    {$IFDEF EXT_LOGICAL}
+    procedure OpcodeAnd;
+    procedure OpcodeOr;
+    procedure OpcodeXor;
     {$ENDIF}
     {$IFDEF EXT_STACK}
@@ -83 +103 @@
     {$IFDEF EXT_SUBROUTINE}
     procedure OpcodeCall;
+    {$IFDEF EXT_REL_JUMP}
     procedure OpcodeCallRel;
+    {$ENDIF}
     procedure OpcodeReturn;
     {$ENDIF}
@@ -90 +112 @@
     procedure OpcodeInput;
     {$ENDIF}
-    procedure OpcodeInc;
-    procedure OpcodeDec;
     {$IFDEF EXT_ARITHMETIC}
     procedure OpcodeAdd;
@@ -245 +265 @@
 end;
 
+{$IFDEF EXT_REL_JUMP}
 procedure TCPU.OpcodeJumpRelCond;
 begin
   if Condition then IP := IP + ReadNext;
+end;
+{$ENDIF}
+{$ENDIF}
+
+{$IFDEF EXT_SHIFT}
+procedure TCPU.OpcodeShl;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := Registers[P1] shl Registers[P2];
+end;
+
+procedure TCPU.OpcodeShr;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := Registers[P1] shr Registers[P2];
+end;
+{$ENDIF}
+
+{$IFDEF EXT_LOGICAL}
+procedure TCPU.OpcodeAnd;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := Registers[P1] and Registers[P2];
+end;
+
+procedure TCPU.OpcodeOr;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := Registers[P1] or Registers[P2];
+end;
+
+procedure TCPU.OpcodeXor;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := Registers[P1] xor Registers[P2];
 end;
 {$ENDIF}
@@ -276 +347 @@
 end;
 
+{$IFDEF EXT_REL_JUMP}
 procedure TCPU.OpcodeCallRel;
 var
@@ -285 +357 @@
   IP := IP + Addr;
 end;
+{$ENDIF}
 
 procedure TCPU.OpcodeReturn;
@@ -386 +459 @@
   OpcodeHandlers[opHalt] := OpcodeHalt;
   OpcodeHandlers[opLoadConst] := OpcodeLoadConst;
+  OpcodeHandlers[opNeg] := OpcodeNeg;
+  OpcodeHandlers[opJump] := OpcodeJump;
+  {$IFDEF EXT_REL_JUMP}
+  OpcodeHandlers[opJumpRel] := OpcodeJumpRel;
+  {$ENDIF}
   {$IFDEF EXT_MEMORY}
   OpcodeHandlers[opLoadMem] := OpcodeLoadMem;
   OpcodeHandlers[opStoreMem] := OpcodeStoreMem;
   {$ENDIF}
-  OpcodeHandlers[opNeg] := OpcodeNeg;
-  OpcodeHandlers[opJump] := OpcodeJump;
-  OpcodeHandlers[opJumpRel] := OpcodeJumpRel;
   {$IFDEF EXT_GENERAL}
   OpcodeHandlers[opExchg] := OpcodeExchange;
+  {$ENDIF}
+  {$IFDEF EXT_LOGICAL}
+  OpcodeHandlers[opAnd] := OpcodeAnd;
+  OpcodeHandlers[opOr] := OpcodeOr;
+  OpcodeHandlers[opXor] := OpcodeXor;
+  {$ENDIF}
+  {$IFDEF EXT_SHIFT}
+  OpcodeHandlers[opShl] := OpcodeShl;
+  OpcodeHandlers[opShr] := OpcodeShr;
   {$ENDIF}
   {$IFDEF EXT_STACK}
@@ -402 +486 @@
   {$IFDEF EXT_SUBROUTINE}
   OpcodeHandlers[opCall] := OpcodeCall;
+  {$IFDEF EXT_REL_JUMP}
   OpcodeHandlers[opCallRel] := OpcodeCallRel;
+  {$ENDIF}
   OpcodeHandlers[opRet] := OpcodeReturn;
   {$ENDIF}
@@ -417 +503 @@
   {$IFDEF EXT_ARITHMETIC}
   OpcodeHandlers[opJumpCond] := OpcodeJumpCond;
+  {$IFDEF EXT_REL_JUMP}
   OpcodeHandlers[opJumpRelCond] := OpcodeJumpRelCond;
+  {$ENDIF}
   OpcodeHandlers[opTestEqual] := OpcodeTestEqual;
   OpcodeHandlers[opTestNotEqual] := OpcodeTestNotEqual;

@@ -3 +3 @@
 virtcpu.lps
 virtcpu.res
+*.dbg