Ignore:
Timestamp:
Aug 6, 2024, 10:31:16 PM (2 months ago)
Author:
chronos
Message:
  • Modified: Optimized DeviceMapper read/write handlers calls without case statement.
  • Modified: Use TInt as base data type which can be redefined to different higher integer type. For start it is Int64.
Location:
branches/ByteArray
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • branches/ByteArray

    • Property svn:ignore set to
      lib
      heaptrclog.trc
      ByteArray
      ByteArray.dbg
      ByteArray.lps
      ByteArray.res
  • branches/ByteArray/Cpu.pas

    r5 r9  
    44
    55uses
    6   Classes, SysUtils, BigInt, Channel;
     6  Classes, SysUtils, Int, Channel;
    77
    88type
     
    5454    FInstructions: array[TInstruction] of TInstructionEvent;
    5555    FTicks: QWord;
    56     procedure Push(Value: TBigInt; Size: TBigIntSize);
    57     function Pop(Size: TBigIntSize): TBigInt;
     56    procedure Push(Value: TInt; Size: TIntSize);
     57    function Pop(Size: TIntSize): TInt;
    5858    procedure InstructionNop;
    5959    procedure InstructionHalt;
     
    109109    procedure Step;
    110110  public
    111     Regs: array[TRegIndex] of TBigInt;
    112     PC: TBigInt;
    113     SP: TBigInt;
    114     DataWidth: TBigIntSize;
    115     AddressWidth: TBigIntSize;
     111    Regs: array[TRegIndex] of TInt;
     112    PC: TInt;
     113    SP: TInt;
     114    DataWidth: TIntSize;
     115    AddressWidth: TIntSize;
    116116    Memory: TChannel;
    117117    IO: TChannel;
    118     function Read(Size: TBigIntSize): TBigInt;
    119     function ReadSize: TBigIntSize;
     118    function Read(Size: TIntSize): TInt;
     119    function ReadSize: TIntSize;
    120120    function ReadRegIndex: TRegIndex;
    121     procedure Write(Size: TBigIntSize; Value: TBigInt);
     121    procedure Write(Size: TIntSize; Value: TInt);
    122122    procedure WriteInstruction(Instruction: TInstruction);
    123123    procedure WriteRegister(Reg: TRegIndex);
     
    155155{ TCpu }
    156156
    157 procedure TCpu.Push(Value: TBigInt; Size: TBigIntSize);
     157procedure TCpu.Push(Value: TInt; Size: TIntSize);
    158158begin
    159159  SP := SP - Size;
     
    161161end;
    162162
    163 function TCpu.Pop(Size: TBigIntSize): TBigInt;
     163function TCpu.Pop(Size: TIntSize): TInt;
    164164begin
    165165  Result := Memory.Read(SP, Size);
     
    188188var
    189189  RegIndex: TRegIndex;
    190   DataSize: TBigIntSize;
     190  DataSize: TIntSize;
    191191begin
    192192  DataSize := ReadSize;
     
    207207procedure TCpu.InstructionLoadSize;
    208208var
    209   DataSize: TBigIntSize;
    210   RegIndex: TRegIndex;
    211   RegIndex2: TRegIndex;
    212 begin
    213   DataSize := ReadSize;
    214   RegIndex := ReadRegIndex;
    215   RegIndex2 := ReadRegIndex;
    216   Regs[RegIndex] := Regs[RegIndex2].Copy(DataSize);
     209  DataSize: TIntSize;
     210  RegIndex: TRegIndex;
     211  RegIndex2: TRegIndex;
     212begin
     213  DataSize := ReadSize;
     214  RegIndex := ReadRegIndex;
     215  RegIndex2 := ReadRegIndex;
     216  Regs[RegIndex] := LimitSize(Regs[RegIndex2], DataSize);
    217217end;
    218218
     
    229229procedure TCpu.InstructionLoadMemSize;
    230230var
    231   DataSize: TBigIntSize;
     231  DataSize: TIntSize;
    232232  RegIndex1: TRegIndex;
    233233  RegIndex2: TRegIndex;
     
    251251procedure TCpu.InstructionStoreMemSize;
    252252var
    253   DataSize: TBigIntSize;
     253  DataSize: TIntSize;
    254254  RegIndex1: TRegIndex;
    255255  RegIndex2: TRegIndex;
     
    265265  RegIndex1: TRegIndex;
    266266  RegIndex2: TRegIndex;
    267   RelativeAddress: TBigInt;
     267  RelativeAddress: TInt;
    268268begin
    269269  RegIndex1 := ReadRegIndex;
     
    275275procedure TCpu.InstructionLoadMemIndexSize;
    276276var
    277   DataSize: TBigIntSize;
     277  DataSize: TIntSize;
    278278  RegIndex1: TRegIndex;
    279279  RegIndex2: TRegIndex;
    280   RelativeAddress: TBigInt;
     280  RelativeAddress: TInt;
    281281begin
    282282  DataSize := ReadSize;
     
    291291  RegIndex1: TRegIndex;
    292292  RegIndex2: TRegIndex;
    293   RelativeAddress: TBigInt;
     293  RelativeAddress: TInt;
    294294begin
    295295  RegIndex1 := ReadRegIndex;
     
    301301procedure TCpu.InstructionStoreMemIndexSize;
    302302var
    303   DataSize: TBigIntSize;
     303  DataSize: TIntSize;
    304304  RegIndex1: TRegIndex;
    305305  RegIndex2: TRegIndex;
    306   RelativeAddress: TBigInt;
     306  RelativeAddress: TInt;
    307307begin
    308308  DataSize := ReadSize;
     
    320320procedure TCpu.InstructionJumpSize;
    321321var
    322   AddressSize: TBigIntSize;
    323 begin
    324   AddressSize := Read(SizeOf(TBigIntSize));
     322  AddressSize: TIntSize;
     323begin
     324  AddressSize := Read(SizeOf(TIntSize));
    325325  PC := Read(AddressSize);
    326326end;
     
    329329var
    330330  RegIndex: TRegIndex;
    331   Address: TBigInt;
     331  Address: TInt;
    332332begin
    333333  RegIndex := ReadRegIndex;
     
    340340var
    341341  RegIndex: TRegIndex;
    342   Address: TBigInt;
    343   DataSize: TBigIntSize;
    344   AddressSize: TBigIntSize;
    345 begin
    346   DataSize := ReadSize;
    347   AddressSize := Read(SizeOf(TBigIntSize));
     342  Address: TInt;
     343  DataSize: TIntSize;
     344  AddressSize: TIntSize;
     345begin
     346  DataSize := ReadSize;
     347  AddressSize := Read(SizeOf(TIntSize));
    348348  RegIndex := ReadRegIndex;
    349349  Address := Read(AddressSize);
    350   if Regs[RegIndex].Copy(DataSize) <> 0 then
     350  if LimitSize(Regs[RegIndex], DataSize) <> 0 then
    351351    PC := Address;
    352352end;
     
    355355var
    356356  RegIndex: TRegIndex;
    357   Address: TBigInt;
     357  Address: TInt;
    358358begin
    359359  RegIndex := ReadRegIndex;
     
    366366var
    367367  RegIndex: TRegIndex;
    368   Address: TBigInt;
    369   DataSize: TBigIntSize;
    370   AddressSize: TBigIntSize;
    371 begin
    372   DataSize := ReadSize;
    373   AddressSize := Read(SizeOf(TBigIntSize));
     368  Address: TInt;
     369  DataSize: TIntSize;
     370  AddressSize: TIntSize;
     371begin
     372  DataSize := ReadSize;
     373  AddressSize := Read(SizeOf(TIntSize));
    374374  RegIndex := ReadRegIndex;
    375375  Address := Read(AddressSize);
    376   if Regs[RegIndex].Copy(DataSize) = 0 then
     376  if LimitSize(Regs[RegIndex], DataSize) = 0 then
    377377    PC := Address;
    378378end;
     
    385385procedure TCpu.InstructionJumpRelSize;
    386386var
    387   AddressSize: TBigIntSize;
     387  AddressSize: TIntSize;
    388388begin
    389389  AddressSize := ReadSize;
     
    399399procedure TCpu.InstructionCallSize;
    400400var
    401   AddressSize: TBigIntSize;
     401  AddressSize: TIntSize;
    402402begin
    403403  AddressSize := ReadSize;
     
    413413procedure TCpu.InstructionRetSize;
    414414var
    415   AddressSize: TBigIntSize;
     415  AddressSize: TIntSize;
    416416begin
    417417  AddressSize := ReadSize;
     
    429429procedure TCpu.InstructionPushSize;
    430430var
    431   DataSize: TBigIntSize;
     431  DataSize: TIntSize;
    432432  RegIndex: TRegIndex;
    433433begin
     
    447447procedure TCpu.InstructionPopSize;
    448448var
    449   DataSize: TBigIntSize;
     449  DataSize: TIntSize;
    450450  RegIndex: TRegIndex;
    451451begin
     
    469469  RegIndex: TRegIndex;
    470470  RegIndex2: TRegIndex;
    471   DataSize: TBigIntSize;
     471  DataSize: TIntSize;
    472472begin
    473473  DataSize := ReadSize;
     
    491491  RegIndex: TRegIndex;
    492492  RegIndex2: TRegIndex;
    493   DataSize: TBigIntSize;
     493  DataSize: TIntSize;
    494494begin
    495495  DataSize := ReadSize;
     
    510510var
    511511  RegIndex: TRegIndex;
    512   DataSize: TBigIntSize;
    513 begin
    514   DataSize := ReadSize;
    515   RegIndex := ReadRegIndex;
    516   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) + 1;
     512  DataSize: TIntSize;
     513begin
     514  DataSize := ReadSize;
     515  RegIndex := ReadRegIndex;
     516  Regs[RegIndex] := LimitSize(Regs[RegIndex], DataSize) + 1;
    517517end;
    518518
     
    528528var
    529529  RegIndex: TRegIndex;
    530   DataSize: TBigIntSize;
    531 begin
    532   DataSize := ReadSize;
    533   RegIndex := ReadRegIndex;
    534   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) - 1;
     530  DataSize: TIntSize;
     531begin
     532  DataSize := ReadSize;
     533  RegIndex := ReadRegIndex;
     534  Regs[RegIndex] := LimitSize(Regs[RegIndex], DataSize) - 1;
    535535end;
    536536
     
    547547procedure TCpu.InstructionXorSize;
    548548var
    549   DataSize: TBigIntSize;
    550   RegIndex: TRegIndex;
    551   RegIndex2: TRegIndex;
    552 begin
    553   DataSize := ReadSize;
    554   RegIndex := ReadRegIndex;
    555   RegIndex2 := ReadRegIndex;
    556   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) xor Regs[RegIndex2].Copy(DataSize);
     549  DataSize: TIntSize;
     550  RegIndex: TRegIndex;
     551  RegIndex2: TRegIndex;
     552begin
     553  DataSize := ReadSize;
     554  RegIndex := ReadRegIndex;
     555  RegIndex2 := ReadRegIndex;
     556  Regs[RegIndex] := LimitSize(Regs[RegIndex] xor Regs[RegIndex2], DataSize);
    557557end;
    558558
     
    569569procedure TCpu.InstructionAndSize;
    570570var
    571   DataSize: TBigIntSize;
    572   RegIndex: TRegIndex;
    573   RegIndex2: TRegIndex;
    574 begin
    575   DataSize := ReadSize;
    576   RegIndex := ReadRegIndex;
    577   RegIndex2 := ReadRegIndex;
    578   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) and Regs[RegIndex2].Copy(DataSize);
     571  DataSize: TIntSize;
     572  RegIndex: TRegIndex;
     573  RegIndex2: TRegIndex;
     574begin
     575  DataSize := ReadSize;
     576  RegIndex := ReadRegIndex;
     577  RegIndex2 := ReadRegIndex;
     578  Regs[RegIndex] := LimitSize(Regs[RegIndex] and Regs[RegIndex2], DataSize);
    579579end;
    580580
     
    591591procedure TCpu.InstructionOrSize;
    592592var
    593   DataSize: TBigIntSize;
    594   RegIndex: TRegIndex;
    595   RegIndex2: TRegIndex;
    596 begin
    597   DataSize := ReadSize;
    598   RegIndex := ReadRegIndex;
    599   RegIndex2 := ReadRegIndex;
    600   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) or Regs[RegIndex2].Copy(DataSize);
     593  DataSize: TIntSize;
     594  RegIndex: TRegIndex;
     595  RegIndex2: TRegIndex;
     596begin
     597  DataSize := ReadSize;
     598  RegIndex := ReadRegIndex;
     599  RegIndex2 := ReadRegIndex;
     600  Regs[RegIndex] := LimitSize(Regs[RegIndex] or Regs[RegIndex2], DataSize);
    601601end;
    602602
     
    613613procedure TCpu.InstructionAddSize;
    614614var
    615   DataSize: TBigIntSize;
    616   RegIndex: TRegIndex;
    617   RegIndex2: TRegIndex;
    618 begin
    619   DataSize := ReadSize;
    620   RegIndex := ReadRegIndex;
    621   RegIndex2 := ReadRegIndex;
    622   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) + Regs[RegIndex2].Copy(DataSize);
     615  DataSize: TIntSize;
     616  RegIndex: TRegIndex;
     617  RegIndex2: TRegIndex;
     618begin
     619  DataSize := ReadSize;
     620  RegIndex := ReadRegIndex;
     621  RegIndex2 := ReadRegIndex;
     622  Regs[RegIndex] := LimitSize(Regs[RegIndex] + Regs[RegIndex2], DataSize);
    623623end;
    624624
     
    635635procedure TCpu.InstructionSubSize;
    636636var
    637   DataSize: TBigIntSize;
    638   RegIndex: TRegIndex;
    639   RegIndex2: TRegIndex;
    640 begin
    641   DataSize := ReadSize;
    642   RegIndex := ReadRegIndex;
    643   RegIndex2 := ReadRegIndex;
    644   Regs[RegIndex] := Regs[RegIndex].Copy(DataSize) + Regs[RegIndex2].Copy(DataSize);
     637  DataSize: TIntSize;
     638  RegIndex: TRegIndex;
     639  RegIndex2: TRegIndex;
     640begin
     641  DataSize := ReadSize;
     642  RegIndex := ReadRegIndex;
     643  RegIndex2 := ReadRegIndex;
     644  Regs[RegIndex] := LimitSize(Regs[RegIndex] + Regs[RegIndex2], DataSize);
    645645end;
    646646
     
    704704end;
    705705
    706 function TCpu.Read(Size: TBigIntSize): TBigInt;
     706function TCpu.Read(Size: TIntSize): TInt;
    707707begin
    708708  Result := Memory.Read(PC, Size);
     
    710710end;
    711711
    712 function TCpu.ReadSize: TBigIntSize;
    713 begin
    714   Result := Read(SizeOf(TBigIntSize));
     712function TCpu.ReadSize: TIntSize;
     713begin
     714  Result := Read(SizeOf(TIntSize));
    715715end;
    716716
     
    720720end;
    721721
    722 procedure TCpu.Write(Size: TBigIntSize; Value: TBigInt);
     722procedure TCpu.Write(Size: TIntSize; Value: TInt);
    723723begin
    724724  Memory.Write(PC, Size, Value);
Note: See TracChangeset for help on using the changeset viewer.