Changeset 12 for branches/bigint/Cpu.pas


Ignore:
Timestamp:
Apr 24, 2025, 10:12:32 PM (2 weeks ago)
Author:
chronos
Message:
  • Added: More CPU instructions.
  • Added: Mouse device.
File:
1 edited

Legend:

Unmodified
Added
Removed
  • branches/bigint/Cpu.pas

    r7 r12  
    1010
    1111  TInstruction = (inNop, inHalt, inLoad, inLoadConst, inInput, inOutput,
    12     inJump, inJumpZero, inJumpNotZero, inInc, inDec, inLoadIndex, inPush, inPop,
    13     inCall, inRet, inLoadMem, inStoreMem);
     12    inJump, inJumpZero, inJumpNotZero, inIncrement, inDecrement, inLoadIndex,
     13    inPush, inPop, inCall, inReturn, inLoadMem, inStoreMem, inAdd, inSubtract,
     14    inAnd, inOr, inXor, inShiftLeft, inShiftRight, inJumpRel, inJumpRelZero,
     15    inJumpRelNotZero, inBitSet, inBitReset, inBitTest, inGetMaxInt, inGetMinInt);
    1416
    1517  { TCpu }
     
    3638    procedure InstructionJumpZero;
    3739    procedure InstructionJumpNotZero;
     40    procedure InstructionJumpRel;
     41    procedure InstructionJumpRelZero;
     42    procedure InstructionJumpRelNotZero;
    3843    procedure InstructionPush;
    3944    procedure InstructionPop;
    4045    procedure InstructionCall;
    4146    procedure InstructionRet;
     47    procedure InstructionAdd;
     48    procedure InstructionSub;
     49    procedure InstructionAnd;
     50    procedure InstructionOr;
     51    procedure InstructionXor;
     52    procedure InstructionShl;
     53    procedure InstructionShr;
     54    procedure InstructionBitSet;
     55    procedure InstructionBitReset;
     56    procedure InstructionBitTest;
     57    procedure InstructionGetMaxInt;
     58    procedure InstructionGetMinInt;
    4259    procedure WriteMem(Address, Data: TInt);
    4360    function ReadMem(Address: TInt): TInt;
     
    180197end;
    181198
     199procedure TCpu.InstructionJumpRel;
     200var
     201  Addr: TInt;
     202begin
     203  Addr := ReadMemPc;
     204  PC := PC + Addr;
     205end;
     206
     207procedure TCpu.InstructionJumpRelZero;
     208var
     209  Condition: TInt;
     210  Addr: TInt;
     211begin
     212  Condition := ReadMemPc;
     213  Addr := ReadMemPc;
     214  if ReadMem(Condition) = 0 then PC := PC + Addr;
     215end;
     216
     217procedure TCpu.InstructionJumpRelNotZero;
     218var
     219  Condition: TInt;
     220  Addr: TInt;
     221begin
     222  Condition := ReadMemPc;
     223  Addr := ReadMemPc;
     224  if ReadMem(Condition) <> 0 then PC := PC + Addr;
     225end;
     226
    182227procedure TCpu.InstructionPush;
    183228begin
     
    202247begin
    203248  PC := Pop;
     249end;
     250
     251procedure TCpu.InstructionAdd;
     252var
     253  Dst, Src1, Src2: TInt;
     254begin
     255  Dst := ReadMemPc;
     256  Src1 := ReadMemPc;
     257  Src2 := ReadMemPc;
     258  WriteMem(Dst, ReadMem(Src1) + ReadMem(Src2));
     259end;
     260
     261procedure TCpu.InstructionSub;
     262var
     263  Dst, Src1, Src2: TInt;
     264begin
     265  Dst := ReadMemPc;
     266  Src1 := ReadMemPc;
     267  Src2 := ReadMemPc;
     268  WriteMem(Dst, ReadMem(Src1) - ReadMem(Src2));
     269end;
     270
     271procedure TCpu.InstructionAnd;
     272var
     273  Dst, Src1, Src2: TInt;
     274begin
     275  Dst := ReadMemPc;
     276  Src1 := ReadMemPc;
     277  Src2 := ReadMemPc;
     278  WriteMem(Dst, ReadMem(Src1) and ReadMem(Src2));
     279end;
     280
     281procedure TCpu.InstructionOr;
     282var
     283  Dst, Src1, Src2: TInt;
     284begin
     285  Dst := ReadMemPc;
     286  Src1 := ReadMemPc;
     287  Src2 := ReadMemPc;
     288  WriteMem(Dst, ReadMem(Src1) or ReadMem(Src2));
     289end;
     290
     291procedure TCpu.InstructionXor;
     292var
     293  Dst, Src1, Src2: TInt;
     294begin
     295  Dst := ReadMemPc;
     296  Src1 := ReadMemPc;
     297  Src2 := ReadMemPc;
     298  WriteMem(Dst, ReadMem(Src1) xor ReadMem(Src2));
     299end;
     300
     301procedure TCpu.InstructionShl;
     302var
     303  Dst, Src, Shift: TInt;
     304begin
     305  Dst := ReadMemPc;
     306  Src := ReadMemPc;
     307  Shift := ReadMemPc;
     308  WriteMem(Dst, ReadMem(Src) shl ReadMem(Shift));
     309end;
     310
     311procedure TCpu.InstructionShr;
     312var
     313  Dst, Src, Shift: TInt;
     314begin
     315  Dst := ReadMemPc;
     316  Src := ReadMemPc;
     317  Shift := ReadMemPc;
     318  WriteMem(Dst, ReadMem(Src) shr ReadMem(Shift));
     319end;
     320
     321procedure TCpu.InstructionBitSet;
     322var
     323  Dst, Src, Bit: TInt;
     324begin
     325  Dst := ReadMemPc;
     326  Src := ReadMemPc;
     327  Bit := ReadMemPc;
     328  WriteMem(Dst, ReadMem(Src) or (1 << ReadMem(Bit)));
     329end;
     330
     331procedure TCpu.InstructionBitReset;
     332var
     333  Dst, Src, Bit: TInt;
     334begin
     335  Dst := ReadMemPc;
     336  Src := ReadMemPc;
     337  Bit := ReadMemPc;
     338  WriteMem(Dst, ReadMem(Src) and (-1 xor (1 << ReadMem(Bit))));
     339end;
     340
     341procedure TCpu.InstructionBitTest;
     342var
     343  Dst, Src, Bit: TInt;
     344begin
     345  Dst := ReadMemPc;
     346  Src := ReadMemPc;
     347  Bit := ReadMemPc;
     348  WriteMem(Dst, (ReadMem(Src) >> ReadMem(Bit)) and 1);
     349end;
     350
     351procedure TCpu.InstructionGetMaxInt;
     352var
     353  Dst: TInt;
     354begin
     355  Dst := ReadMemPc;
     356  WriteMem(Dst, SizeOf(TInt) * 8);
     357end;
     358
     359procedure TCpu.InstructionGetMinInt;
     360var
     361  Dst: TInt;
     362begin
     363  Dst := ReadMemPc;
     364//  WriteMem(Dst, SizeOf(TInt) * 8);
    204365end;
    205366
     
    281442  Instructions[inJumpZero] := InstructionJumpZero;
    282443  Instructions[inJumpNotZero] := InstructionJumpNotZero;
    283   Instructions[inInc] := InstructionInc;
    284   Instructions[inDec] := InstructionDec;
     444  Instructions[inJumpRel] := InstructionJumpRel;
     445  Instructions[inJumpRelZero] := InstructionJumpRelZero;
     446  Instructions[inJumpRelNotZero] := InstructionJumpRelNotZero;
     447  Instructions[inIncrement] := InstructionInc;
     448  Instructions[inDecrement] := InstructionDec;
    285449  Instructions[inPush] := InstructionPush;
    286450  Instructions[inPop] := InstructionPop;
    287451  Instructions[inCall] := InstructionCall;
    288   Instructions[inRet] := InstructionRet;
     452  Instructions[inReturn] := InstructionRet;
     453  Instructions[inAdd] := InstructionAdd;
     454  Instructions[inSubtract] := InstructionSub;
     455  Instructions[inAnd] := InstructionAnd;
     456  Instructions[inOr] := InstructionOr;
     457  Instructions[inXor] := InstructionXor;
     458  Instructions[inShiftLeft] := InstructionShl;
     459  Instructions[inShiftRight] := InstructionShr;
     460  Instructions[inBitSet] := InstructionBitSet;
     461  Instructions[inBitReset] := InstructionBitReset;
     462  Instructions[inBitTest] := InstructionBitTest;
     463  Instructions[inGetMaxInt] := InstructionGetMaxInt;
     464  Instructions[inGetMinInt] := InstructionGetMinInt;
    289465end;
    290466
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