Changeset 12 for branches/bigint/Cpu.pas
- Timestamp:
- Apr 24, 2025, 10:12:32 PM (2 weeks ago)
- File:
-
- 1 edited
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branches/bigint/Cpu.pas
r7 r12 10 10 11 11 TInstruction = (inNop, inHalt, inLoad, inLoadConst, inInput, inOutput, 12 inJump, inJumpZero, inJumpNotZero, inInc, inDec, inLoadIndex, inPush, inPop, 13 inCall, inRet, inLoadMem, inStoreMem); 12 inJump, inJumpZero, inJumpNotZero, inIncrement, inDecrement, inLoadIndex, 13 inPush, inPop, inCall, inReturn, inLoadMem, inStoreMem, inAdd, inSubtract, 14 inAnd, inOr, inXor, inShiftLeft, inShiftRight, inJumpRel, inJumpRelZero, 15 inJumpRelNotZero, inBitSet, inBitReset, inBitTest, inGetMaxInt, inGetMinInt); 14 16 15 17 { TCpu } … … 36 38 procedure InstructionJumpZero; 37 39 procedure InstructionJumpNotZero; 40 procedure InstructionJumpRel; 41 procedure InstructionJumpRelZero; 42 procedure InstructionJumpRelNotZero; 38 43 procedure InstructionPush; 39 44 procedure InstructionPop; 40 45 procedure InstructionCall; 41 46 procedure InstructionRet; 47 procedure InstructionAdd; 48 procedure InstructionSub; 49 procedure InstructionAnd; 50 procedure InstructionOr; 51 procedure InstructionXor; 52 procedure InstructionShl; 53 procedure InstructionShr; 54 procedure InstructionBitSet; 55 procedure InstructionBitReset; 56 procedure InstructionBitTest; 57 procedure InstructionGetMaxInt; 58 procedure InstructionGetMinInt; 42 59 procedure WriteMem(Address, Data: TInt); 43 60 function ReadMem(Address: TInt): TInt; … … 180 197 end; 181 198 199 procedure TCpu.InstructionJumpRel; 200 var 201 Addr: TInt; 202 begin 203 Addr := ReadMemPc; 204 PC := PC + Addr; 205 end; 206 207 procedure TCpu.InstructionJumpRelZero; 208 var 209 Condition: TInt; 210 Addr: TInt; 211 begin 212 Condition := ReadMemPc; 213 Addr := ReadMemPc; 214 if ReadMem(Condition) = 0 then PC := PC + Addr; 215 end; 216 217 procedure TCpu.InstructionJumpRelNotZero; 218 var 219 Condition: TInt; 220 Addr: TInt; 221 begin 222 Condition := ReadMemPc; 223 Addr := ReadMemPc; 224 if ReadMem(Condition) <> 0 then PC := PC + Addr; 225 end; 226 182 227 procedure TCpu.InstructionPush; 183 228 begin … … 202 247 begin 203 248 PC := Pop; 249 end; 250 251 procedure TCpu.InstructionAdd; 252 var 253 Dst, Src1, Src2: TInt; 254 begin 255 Dst := ReadMemPc; 256 Src1 := ReadMemPc; 257 Src2 := ReadMemPc; 258 WriteMem(Dst, ReadMem(Src1) + ReadMem(Src2)); 259 end; 260 261 procedure TCpu.InstructionSub; 262 var 263 Dst, Src1, Src2: TInt; 264 begin 265 Dst := ReadMemPc; 266 Src1 := ReadMemPc; 267 Src2 := ReadMemPc; 268 WriteMem(Dst, ReadMem(Src1) - ReadMem(Src2)); 269 end; 270 271 procedure TCpu.InstructionAnd; 272 var 273 Dst, Src1, Src2: TInt; 274 begin 275 Dst := ReadMemPc; 276 Src1 := ReadMemPc; 277 Src2 := ReadMemPc; 278 WriteMem(Dst, ReadMem(Src1) and ReadMem(Src2)); 279 end; 280 281 procedure TCpu.InstructionOr; 282 var 283 Dst, Src1, Src2: TInt; 284 begin 285 Dst := ReadMemPc; 286 Src1 := ReadMemPc; 287 Src2 := ReadMemPc; 288 WriteMem(Dst, ReadMem(Src1) or ReadMem(Src2)); 289 end; 290 291 procedure TCpu.InstructionXor; 292 var 293 Dst, Src1, Src2: TInt; 294 begin 295 Dst := ReadMemPc; 296 Src1 := ReadMemPc; 297 Src2 := ReadMemPc; 298 WriteMem(Dst, ReadMem(Src1) xor ReadMem(Src2)); 299 end; 300 301 procedure TCpu.InstructionShl; 302 var 303 Dst, Src, Shift: TInt; 304 begin 305 Dst := ReadMemPc; 306 Src := ReadMemPc; 307 Shift := ReadMemPc; 308 WriteMem(Dst, ReadMem(Src) shl ReadMem(Shift)); 309 end; 310 311 procedure TCpu.InstructionShr; 312 var 313 Dst, Src, Shift: TInt; 314 begin 315 Dst := ReadMemPc; 316 Src := ReadMemPc; 317 Shift := ReadMemPc; 318 WriteMem(Dst, ReadMem(Src) shr ReadMem(Shift)); 319 end; 320 321 procedure TCpu.InstructionBitSet; 322 var 323 Dst, Src, Bit: TInt; 324 begin 325 Dst := ReadMemPc; 326 Src := ReadMemPc; 327 Bit := ReadMemPc; 328 WriteMem(Dst, ReadMem(Src) or (1 << ReadMem(Bit))); 329 end; 330 331 procedure TCpu.InstructionBitReset; 332 var 333 Dst, Src, Bit: TInt; 334 begin 335 Dst := ReadMemPc; 336 Src := ReadMemPc; 337 Bit := ReadMemPc; 338 WriteMem(Dst, ReadMem(Src) and (-1 xor (1 << ReadMem(Bit)))); 339 end; 340 341 procedure TCpu.InstructionBitTest; 342 var 343 Dst, Src, Bit: TInt; 344 begin 345 Dst := ReadMemPc; 346 Src := ReadMemPc; 347 Bit := ReadMemPc; 348 WriteMem(Dst, (ReadMem(Src) >> ReadMem(Bit)) and 1); 349 end; 350 351 procedure TCpu.InstructionGetMaxInt; 352 var 353 Dst: TInt; 354 begin 355 Dst := ReadMemPc; 356 WriteMem(Dst, SizeOf(TInt) * 8); 357 end; 358 359 procedure TCpu.InstructionGetMinInt; 360 var 361 Dst: TInt; 362 begin 363 Dst := ReadMemPc; 364 // WriteMem(Dst, SizeOf(TInt) * 8); 204 365 end; 205 366 … … 281 442 Instructions[inJumpZero] := InstructionJumpZero; 282 443 Instructions[inJumpNotZero] := InstructionJumpNotZero; 283 Instructions[inInc] := InstructionInc; 284 Instructions[inDec] := InstructionDec; 444 Instructions[inJumpRel] := InstructionJumpRel; 445 Instructions[inJumpRelZero] := InstructionJumpRelZero; 446 Instructions[inJumpRelNotZero] := InstructionJumpRelNotZero; 447 Instructions[inIncrement] := InstructionInc; 448 Instructions[inDecrement] := InstructionDec; 285 449 Instructions[inPush] := InstructionPush; 286 450 Instructions[inPop] := InstructionPop; 287 451 Instructions[inCall] := InstructionCall; 288 Instructions[inRet] := InstructionRet; 452 Instructions[inReturn] := InstructionRet; 453 Instructions[inAdd] := InstructionAdd; 454 Instructions[inSubtract] := InstructionSub; 455 Instructions[inAnd] := InstructionAnd; 456 Instructions[inOr] := InstructionOr; 457 Instructions[inXor] := InstructionXor; 458 Instructions[inShiftLeft] := InstructionShl; 459 Instructions[inShiftRight] := InstructionShr; 460 Instructions[inBitSet] := InstructionBitSet; 461 Instructions[inBitReset] := InstructionBitReset; 462 Instructions[inBitTest] := InstructionBitTest; 463 Instructions[inGetMaxInt] := InstructionGetMaxInt; 464 Instructions[inGetMinInt] := InstructionGetMinInt; 289 465 end; 290 466
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