Changeset 182 for branches


Ignore:
Timestamp:
Apr 13, 2019, 1:32:32 PM (6 years ago)
Author:
chronos
Message:
  • Fixed: Allow to use multiple prefix instructions in row.
Location:
branches/virtualcpu4
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • branches/virtualcpu4/Forms/UFormMain.pas

    r181 r182  
    159159  LabelPrintLoop := IP;
    160160    DataPrefix8; LoadMem(R3, R1);
    161     DataPrefix8; Output(0, R3);
     161    AddrPrefix8; DataPrefix8; Output(0, R3);
    162162    Increment(R1);
    163163    Decrement(R2);
    … …  
    199199
    200200    // Read keyboard and print to console
    201     Loadi(R1, 100);
     201    Loadi(R1, 0);
    202202  LabelConsole := IP;
    203203    Increment(R1);
    204     Loadi(R2, $100);
     204    Loadi(R2, $ff);
    205205    DataPrefix8; StoreMem(R2, R1);
    206     DataPrefix8; Input(R2, 0);
    207     DataPrefix8; Output(0, R2);
     206    AddrPrefix8; DataPrefix8; Input(R2, 0);
     207    AddrPrefix8; DataPrefix8; Output(0, R2);
    208208    Jump(LabelConsole);
    209209

  • branches/virtualcpu4/UCpu.pas

    r181 r182  
    4141  TCpu = class
    4242  private
     43    FAddrSizeBase: TBitWidth;
     44    FDataSizeBase: TBitWidth;
    4345    FOnInput: TInputEvent;
    4446    FOnOutput: TOutputEvent;
    … …  
    4648    FTicks: Integer;
    4749    Instructions: array[TOpcode] of TInstructionEvent;
    48     DataSizeLast: TBitWidth;
    49     DataSizePrefix: TBitWidth;
    50     AddrSizeLast: TBitWidth;
    51     AddrSizePrefix: TBitWidth;
     50    Prefix: Boolean;
    5251    Z: Boolean;
    5352    Thread: TCpuThread;
    … …  
    101100    procedure InstAddrSize;
    102101    procedure InitInstructions;
     102    procedure SetAddrSizeBase(AValue: TBitWidth);
     103    procedure SetDataSizeBase(AValue: TBitWidth);
    103104  public
    104105    Memory: Pointer;
    … …  
    107108    IP: TAddress;
    108109    SP: TAddress;
     110    DataSize: TBitWidth;
    109111    AddrSize: TBitWidth;
    110     DataSize: TBitWidth;
    111112    procedure Run;
    112113    procedure Step; inline;
    … …  
    121122    constructor Create;
    122123    destructor Destroy; override;
     124    property DataSizeBase: TBitWidth read FDataSizeBase write SetDataSizeBase;
     125    property AddrSizeBase: TBitWidth read FAddrSizeBase write SetAddrSizeBase;
    123126    property Ticks: Integer read FTicks;
    124127    property Running: Boolean read FRunning;
    … …  
    140143    Param2: TOpcodeParam;
    141144    Param3: TOpcodeParam;
     145    Prefix: Boolean;
    142146  end;
    143147
    … …  
    146150  BitWidthText: array[TBitWidth] of string = ('None', '8-bit', '16-bit', '32-bit', '64-bit');
    147151  OpcodeDef: array[TOpcode] of TOpcodeDef = (
    148     (Name: 'NOP'; Param1: prNone; Param2: prNone; Param3: prNone),
    149     (Name: 'HALT'; Param1: prNone; Param2: prNone; Param3: prNone),
    150     (Name: 'LD'; Param1: prReg; Param2: prReg; Param3: prNone),
    151     (Name: 'LDI'; Param1: prReg; Param2: prData; Param3: prNone),
    152     (Name: 'JP'; Param1: prAddr; Param2: prNone; Param3: prNone),
    153     (Name: 'JPZ'; Param1: prAddr; Param2: prNone; Param3: prNone),
    154     (Name: 'JPNZ'; Param1: prAddr; Param2: prNone; Param3: prNone),
    155     (Name: 'JR'; Param1: prAddrRel; Param2: prNone; Param3: prNone),
    156     (Name: 'JRZ'; Param1: prAddrRel; Param2: prNone; Param3: prNone),
    157     (Name: 'JRNZ'; Param1: prAddrRel; Param2: prNone; Param3: prNone),
    158     (Name: 'NEG'; Param1: prReg; Param2: prNone; Param3: prNone),
    159     (Name: 'CLR'; Param1: prReg; Param2: prNone; Param3: prNone),
    160     (Name: 'LDM'; Param1: prReg; Param2: prReg; Param3: prNone),
    161     (Name: 'STM'; Param1: prReg; Param2: prReg; Param3: prNone),
    162     (Name: 'EX'; Param1: prReg; Param2: prReg; Param3: prNone),
    163     (Name: 'PUSH'; Param1: prReg; Param2: prNone; Param3: prNone),
    164     (Name: 'POP'; Param1: prReg; Param2: prNone; Param3: prNone),
    165     (Name: 'CALL'; Param1: prAddr; Param2: prNone; Param3: prNone),
    166     (Name: 'RET'; Param1: prNone; Param2: prNone; Param3: prNone),
    167     (Name: 'ADD'; Param1: prReg; Param2: prReg; Param3: prNone),
    168     (Name: 'ADDI'; Param1: prReg; Param2: prData; Param3: prNone),
    169     (Name: 'SUB'; Param1: prReg; Param2: prReg; Param3: prNone),
    170     (Name: 'SUBI'; Param1: prReg; Param2: prData; Param3: prNone),
    171     (Name: 'INC'; Param1: prReg; Param2: prNone; Param3: prNone),
    172     (Name: 'DEC'; Param1: prReg; Param2: prNone; Param3: prNone),
    173     (Name: 'IN'; Param1: prReg; Param2: prAddr; Param3: prNone),
    174     (Name: 'OUT'; Param1: prAddr; Param2: prReg; Param3: prNone),
    175     (Name: 'SHL'; Param1: prReg; Param2: prReg; Param3: prNone),
    176     (Name: 'SHR'; Param1: prReg; Param2: prReg; Param3: prNone),
    177     (Name: 'DP8'; Param1: prNone; Param2: prNone; Param3: prNone),
    178     (Name: 'DP16'; Param1: prNone; Param2: prNone; Param3: prNone),
    179     (Name: 'DP32'; Param1: prNone; Param2: prNone; Param3: prNone),
    180     (Name: 'DP64'; Param1: prNone; Param2: prNone; Param3: prNone),
    181     (Name: 'DS'; Param1: prNone; Param2: prNone; Param3: prNone),
    182     (Name: 'AS'; Param1: prNone; Param2: prNone; Param3: prNone),
    183     (Name: 'TEST'; Param1: prReg; Param2: prNone; Param3: prNone),
    184     (Name: 'AND'; Param1: prReg; Param2: prReg; Param3: prNone),
    185     (Name: 'OR'; Param1: prReg; Param2: prReg; Param3: prNone),
    186     (Name: 'XOR'; Param1: prReg; Param2: prReg; Param3: prNone),
    187     (Name: 'LDDR'; Param1: prReg; Param2: prReg; Param3: prReg),
    188     (Name: 'LDDR'; Param1: prReg; Param2: prReg; Param3: prReg),
    189     (Name: 'MUL'; Param1: prReg; Param2: prReg; Param3: prNone),
    190     (Name: 'DIV'; Param1: prReg; Param2: prReg; Param3: prNone),
    191     (Name: 'MOD'; Param1: prReg; Param2: prReg; Param3: prNone),
    192     (Name: 'AP8'; Param1: prNone; Param2: prNone; Param3: prNone),
    193     (Name: 'AP16'; Param1: prNone; Param2: prNone; Param3: prNone),
    194     (Name: 'AP32'; Param1: prNone; Param2: prNone; Param3: prNone),
    195     (Name: 'AP64'; Param1: prNone; Param2: prNone; Param3: prNone)
     152    (Name: 'NOP'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     153    (Name: 'HALT'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     154    (Name: 'LD'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     155    (Name: 'LDI'; Param1: prReg; Param2: prData; Param3: prNone; Prefix: False),
     156    (Name: 'JP'; Param1: prAddr; Param2: prNone; Param3: prNone; Prefix: False),
     157    (Name: 'JPZ'; Param1: prAddr; Param2: prNone; Param3: prNone; Prefix: False),
     158    (Name: 'JPNZ'; Param1: prAddr; Param2: prNone; Param3: prNone; Prefix: False),
     159    (Name: 'JR'; Param1: prAddrRel; Param2: prNone; Param3: prNone; Prefix: False),
     160    (Name: 'JRZ'; Param1: prAddrRel; Param2: prNone; Param3: prNone; Prefix: False),
     161    (Name: 'JRNZ'; Param1: prAddrRel; Param2: prNone; Param3: prNone; Prefix: False),
     162    (Name: 'NEG'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     163    (Name: 'CLR'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     164    (Name: 'LDM'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     165    (Name: 'STM'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     166    (Name: 'EX'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     167    (Name: 'PUSH'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     168    (Name: 'POP'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     169    (Name: 'CALL'; Param1: prAddr; Param2: prNone; Param3: prNone; Prefix: False),
     170    (Name: 'RET'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     171    (Name: 'ADD'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     172    (Name: 'ADDI'; Param1: prReg; Param2: prData; Param3: prNone; Prefix: False),
     173    (Name: 'SUB'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     174    (Name: 'SUBI'; Param1: prReg; Param2: prData; Param3: prNone; Prefix: False),
     175    (Name: 'INC'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     176    (Name: 'DEC'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     177    (Name: 'IN'; Param1: prReg; Param2: prAddr; Param3: prNone; Prefix: False),
     178    (Name: 'OUT'; Param1: prAddr; Param2: prReg; Param3: prNone; Prefix: False),
     179    (Name: 'SHL'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     180    (Name: 'SHR'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     181    (Name: 'DP8'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     182    (Name: 'DP16'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     183    (Name: 'DP32'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     184    (Name: 'DP64'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     185    (Name: 'DS'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     186    (Name: 'AS'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: False),
     187    (Name: 'TEST'; Param1: prReg; Param2: prNone; Param3: prNone; Prefix: False),
     188    (Name: 'AND'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     189    (Name: 'OR'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     190    (Name: 'XOR'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     191    (Name: 'LDDR'; Param1: prReg; Param2: prReg; Param3: prReg; Prefix: False),
     192    (Name: 'LDDR'; Param1: prReg; Param2: prReg; Param3: prReg; Prefix: False),
     193    (Name: 'MUL'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     194    (Name: 'DIV'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     195    (Name: 'MOD'; Param1: prReg; Param2: prReg; Param3: prNone; Prefix: False),
     196    (Name: 'AP8'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     197    (Name: 'AP16'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     198    (Name: 'AP32'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True),
     199    (Name: 'AP64'; Param1: prNone; Param2: prNone; Param3: prNone; Prefix: True)
    196200  );
    197201
    … …  
    991995procedure TCpu.InstDataPrefix8;
    992996begin
    993   DataSizePrefix := bw8;
     997  DataSize := bw8;
     998  Prefix := True;
    994999end;
    9951000
    9961001procedure TCpu.InstDataPrefix16;
    9971002begin
    998   DataSizePrefix := bw16;
     1003  DataSize := bw16;
     1004  Prefix := True;
    9991005end;
    10001006
    10011007procedure TCpu.InstDataPrefix32;
    10021008begin
    1003   DataSizePrefix := bw32;
     1009  DataSize := bw32;
     1010  Prefix := True;
    10041011end;
    10051012
    10061013procedure TCpu.InstDataPrefix64;
    10071014begin
    1008   DataSizePrefix := bw64;
     1015  DataSize := bw64;
     1016  Prefix := True;
    10091017end;
    10101018
    10111019procedure TCpu.InstDataSize;
    10121020begin
    1013   DataSize := TBitWidth(Read8);
     1021  DataSizeBase := TBitWidth(Read8);
     1022  DataSize := DataSizeBase;
    10141023end;
    10151024
    10161025procedure TCpu.InstAddrPrefix8;
    10171026begin
    1018   AddrSizePrefix := bw8;
     1027  AddrSize := bw8;
     1028  Prefix := True;
    10191029end;
    10201030
    10211031procedure TCpu.InstAddrPrefix16;
    10221032begin
    1023   AddrSizePrefix := bw16;
     1033  AddrSize := bw16;
     1034  Prefix := True;
    10241035end;
    10251036
    10261037procedure TCpu.InstAddrPrefix32;
    10271038begin
    1028   AddrSizePrefix := bw32;
     1039  AddrSize := bw32;
     1040  Prefix := True;
    10291041end;
    10301042
    10311043procedure TCpu.InstAddrPrefix64;
    10321044begin
    1033   AddrSizePrefix := bw64;
     1045  AddrSize := bw64;
     1046  Prefix := True;
    10341047end;
    10351048
    10361049procedure TCpu.InstAddrSize;
    10371050begin
    1038   AddrSize := TBitWidth(Read8);
     1051  AddrSizeBase := TBitWidth(Read8);
     1052  AddrSize := AddrSizeBase;
    10391053end;
    10401054
    … …  
    10911105end;
    10921106
     1107procedure TCpu.SetAddrSizeBase(AValue: TBitWidth);
     1108begin
     1109  if FAddrSizeBase = AValue then Exit;
     1110  FAddrSizeBase := AValue;
     1111  AddrSize := AValue;
     1112end;
     1113
     1114procedure TCpu.SetDataSizeBase(AValue: TBitWidth);
     1115begin
     1116  if FDataSizeBase = AValue then Exit;
     1117  FDataSizeBase := AValue;
     1118  DataSize := AValue;
     1119end;
     1120
    10931121procedure TCpu.Run;
    10941122begin
     1123  DataSize := DataSizeBase;
     1124  AddrSize := AddrSizeBase;
    10951125  Terminated := False;
    10961126  FTicks := 0;
    1097   DataSizeLast := bwNone;
    10981127  IP := 0;
    10991128  SP := MemSize(Memory);
    … …  
    11061135  Opcode: Byte;
    11071136begin
    1108   if DataSizePrefix <> bwNone then begin
    1109     DataSizeLast := DataSize;
    1110     DataSize := DataSizePrefix;
    1111     DataSizePrefix := bwNone;
    1112   end;
    1113   if AddrSizePrefix <> bwNone then begin
    1114     AddrSizeLast := AddrSize;
    1115     AddrSize := AddrSizePrefix;
    1116     AddrSizePrefix := bwNone;
    1117   end;
     1137  Prefix := False;
    11181138  Opcode := Read8;
    11191139  if Opcode < Length(Instructions) then begin
    … …  
    11211141      else raise Exception.Create('Missing instruction handler for opcode '+ IntToStr(Opcode));
    11221142  end else raise Exception.Create('Unsupported opcode ' + IntToStr(Opcode) + ' at address ' + IntToHex(IP - 1, 8) + '.');
    1123   if DataSizeLast <> bwNone then begin
    1124     DataSize := DataSizeLast;
    1125     DataSizeLast := bwNone;
    1126   end;
    1127   if AddrSizeLast <> bwNone then begin
    1128     AddrSize := AddrSizeLast;
    1129     AddrSizeLast := bwNone;
     1143  if not Prefix then begin
     1144    DataSize := DataSizeBase;
     1145    AddrSize := AddrSizeBase;
    11301146  end;
    11311147  IP := IP mod MemSize(Memory);
    … …  
    12011217constructor TCpu.Create;
    12021218begin
    1203   DataSize := bw16;
    1204   AddrSize := bw16;
     1219  DataSizeBase := bw16;
     1220  AddrSizeBase := bw16;
    12051221  SetLength(Registers, 32);
    12061222  InitInstructions;

  • branches/virtualcpu4/UDisassembler.pas

    r181 r182  
    66
    77uses
    8   Classes, SysUtils, UMemory, fgl, UCpu, UInstructionReader;
     8  Classes, SysUtils, UMemory, fgl, UCpu, UInstructionReader, Math;
    99
    1010type
    … …  
    2929implementation
    3030
     31const
     32  SignText: array[TValueSign] of string = ('-', '', '+');
     33
     34function SignedIntToHex(Value: Int64; Digits: Byte): string;
     35begin
     36  Result := SignText[Sign(Value)] + IntToHex(Abs(Value), Digits);
     37end;
     38
    3139{ TDisassembler }
    3240
    … …  
    4654  MemorySize := MemSize(Cpu.Memory);
    4755  while IP < MemorySize do begin
    48     if DataSizePrefix <> bwNone then begin
    49       DataSizeLast := DataSize;
    50       DataSize := DataSizePrefix;
    51       DataSizePrefix := bwNone;
    52     end;
    53     if AddrSizePrefix <> bwNone then begin
    54       AddrSizeLast := AddrSize;
    55       AddrSize := AddrSizePrefix;
    56       AddrSizePrefix := bwNone;
    57     end;
     56    Prefix := False;
    5857    Opcode := Read8;
    5958    if Opcode < Integer(High(TOpcode)) then begin
     59      Prefix := OpcodeDef[TOpcode(Opcode)].Prefix;
    6060      case TOpcode(Opcode) of
    61         opDataPrefix8: DataSizePrefix := bw8;
    62         opDataPrefix16: DataSizePrefix := bw16;
    63         opDataPrefix32: DataSizePrefix := bw32;
    64         opDataPrefix64: DataSizePrefix := bw64;
    65         opAddrPrefix8: AddrSizePrefix := bw8;
    66         opAddrPrefix16: AddrSizePrefix := bw16;
    67         opAddrPrefix32: AddrSizePrefix := bw32;
    68         opAddrPrefix64: AddrSizePrefix := bw64;
     61        opDataPrefix8: DataSize := bw8;
     62        opDataPrefix16: DataSize := bw16;
     63        opDataPrefix32: DataSize := bw32;
     64        opDataPrefix64: DataSize := bw64;
     65        opAddrPrefix8: AddrSize := bw8;
     66        opAddrPrefix16: AddrSize := bw16;
     67        opAddrPrefix32: AddrSize := bw32;
     68        opAddrPrefix64: AddrSize := bw64;
    6969      end;
    7070      Line := TDisassemblerLine.Create;
    … …  
    9090        prAddrRel: begin
    9191          AddressRel := ReadAddressSigned;
    92           Line.Opcode := Line.Opcode + ' ' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    93           Line.Instruction := Line.Instruction + ' $' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
     92          Line.Opcode := Line.Opcode + ' ' + IntToHex(QWord(AddressRel), BitWidthBytes[AddrSize] * 2);
     93          Line.Instruction := Line.Instruction + ' $' + SignedIntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    9494        end;
    9595      end;
    … …  
    113113          AddressRel := ReadAddressSigned;
    114114          Line.Opcode := Line.Opcode + ' ' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    115           Line.Instruction := Line.Instruction + ', $' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
     115          Line.Instruction := Line.Instruction + ', $' + SignedIntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    116116        end;
    117117      end;
    … …  
    134134        prAddrRel: begin
    135135          AddressRel := ReadAddressSigned;
    136           Line.Opcode := Line.Opcode + ' ' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    137           Line.Instruction := Line.Instruction + ', $' + IntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
     136          Line.Opcode := Line.Opcode + ' ' + IntToHex(QWord(AddressRel), BitWidthBytes[AddrSize] * 2);
     137          Line.Instruction := Line.Instruction + ', $' + SignedIntToHex(AddressRel, BitWidthBytes[AddrSize] * 2);
    138138        end;
    139139      end;
    … …  
    147147      }
    148148    end;
    149     if DataSizeLast <> bwNone then begin
    150       DataSize := DataSizeLast;
    151       DataSizeLast := bwNone;
    152     end;
    153     if AddrSizeLast <> bwNone then begin
    154       AddrSize := AddrSizeLast;
    155       AddrSizeLast := bwNone;
     149    if not Prefix then begin
     150      DataSize := DataSizeBase;
     151      AddrSize := AddrSizeBase;
    156152    end;
    157153  end;

  • branches/virtualcpu4/UInstructionReader.pas

    r181 r182  
    1414  TInstructionReader = class
    1515  protected
    16     DataSizeLast: TBitWidth;
    17     DataSizePrefix: TBitWidth;
    18     AddrSizeLast: TBitWidth;
    19     AddrSizePrefix: TBitWidth;
    2016  public
    2117    Cpu: TCpu;
    2218    IP: Integer;
     19    Prefix: Boolean;
    2320    DataSize: TBitWidth;
     21    DataSizeBase: TBitWidth;
    2422    AddrSize: TBitWidth;
     23    AddrSizeBase: TBitWidth;
    2524    procedure Init;
    2625    function Read8: Byte; inline;
    … …  
    3938procedure TInstructionReader.Init;
    4039begin
    41   DataSize := Cpu.DataSize;
    42   AddrSize := Cpu.AddrSize;
     40  DataSizeBase := Cpu.DataSizeBase;
     41  DataSize := DataSizeBase;
     42  AddrSizeBase := Cpu.AddrSizeBase;
     43  AddrSize := AddrSizeBase;
    4344end;
    4445

  • branches/virtualcpu4/UInstructionWriter.pas

    r181 r182  
    1414  TInstructionWriter = class
    1515  private
    16     DataSizeLast: TBitWidth;
    17     DataSizePrefix: TBitWidth;
    18     AddrSizeLast: TBitWidth;
    19     AddrSizePrefix: TBitWidth;
    2016    procedure PrefixBegin;
    2117    procedure PrefixEnd;
    … …  
    2420    IP: Integer;
    2521    DataSize: TBitWidth;
     22    DataSizeBase: TBitWidth;
    2623    AddrSize: TBitWidth;
     24    AddrSizeBase: TBitWidth;
     25    Prefix: Boolean;
    2726    procedure Init;
    2827    procedure Write8(Value: Byte);
    … …  
    162161  Write8(Byte(opJumpRelZero));
    163162  WriteAddressSigned(Int64(Addr) - Int64(NextIP));
    164   if AddrSizeLast <> bwNone then AddrSize := AddrSizeLast;
    165163  PrefixEnd;
    166164end;
    … …  
    199197procedure TInstructionWriter.DataPrefix8;
    200198begin
    201   DataSizePrefix := bw8;
     199  Prefix := True;
     200  DataSize := bw8;
    202201  Write8(Byte(opDataPrefix8));
    203202end;
    … …  
    205204procedure TInstructionWriter.DataPrefix16;
    206205begin
    207   DataSizePrefix := bw16;
     206  Prefix := True;
     207  DataSize := bw16;
    208208  Write8(Byte(opDataPrefix16));
    209209end;
    … …  
    211211procedure TInstructionWriter.DataPrefix32;
    212212begin
    213   DataSizePrefix := bw32;
     213  Prefix := True;
     214  DataSize := bw32;
    214215  Write8(Byte(opDataPrefix32));
    215216end;
    … …  
    217218procedure TInstructionWriter.DataPrefix64;
    218219begin
    219   DataSizePrefix := bw64;
     220  Prefix := True;
     221  DataSize := bw64;
    220222  Write8(Byte(opDataPrefix64));
    221223end;
    … …  
    223225procedure TInstructionWriter.AddrPrefix8;
    224226begin
    225   AddrSizePrefix := bw8;
     227  Prefix := True;
     228  AddrSize := bw8;
    226229  Write8(Byte(opAddrPrefix8));
    227230end;
    … …  
    229232procedure TInstructionWriter.AddrPrefix16;
    230233begin
    231   AddrSizePrefix := bw16;
     234  Prefix := True;
     235  AddrSize := bw16;
    232236  Write8(Byte(opAddrPrefix16));
    233237end;
    … …  
    235239procedure TInstructionWriter.AddrPrefix32;
    236240begin
    237   AddrSizePrefix := bw32;
     241  Prefix := True;
     242  AddrSize := bw32;
    238243  Write8(Byte(opAddrPrefix32));
    239244end;
    … …  
    241246procedure TInstructionWriter.AddrPrefix64;
    242247begin
    243   AddrSizePrefix := bw64;
     248  Prefix := True;
     249  AddrSize := bw64;
    244250  Write8(Byte(opAddrPrefix64));
    245251end;
    … …  
    297303procedure TInstructionWriter.PrefixBegin;
    298304begin
    299   if DataSizePrefix <> bwNone then begin
    300     DataSizeLast := DataSize;
    301     DataSize := DataSizePrefix;
    302     DataSizePrefix := bwNone;
    303   end;
    304   if AddrSizePrefix <> bwNone then begin
    305     AddrSizeLast := AddrSize;
    306     AddrSize := AddrSizePrefix;
    307     AddrSizePrefix := bwNone;
    308   end;
     305  Prefix := False;
    309306end;
    310307
    311308procedure TInstructionWriter.PrefixEnd;
    312309begin
    313   if DataSizeLast <> bwNone then begin
    314     DataSize := DataSizeLast;
    315     DataSizeLast := bwNone;
    316   end;
    317   if AddrSizeLast <> bwNone then begin
    318     AddrSize := AddrSizeLast;
    319     AddrSizeLast := bwNone;
     310  if not Prefix then begin
     311    DataSize := DataSizeBase;
     312    AddrSize := AddrSizeBase;
    320313  end;
    321314end;
    … …  
    323316procedure TInstructionWriter.Init;
    324317begin
    325   DataSize := Cpu.DataSize;
    326   AddrSize := Cpu.AddrSize;
     318  DataSizeBase := Cpu.DataSizeBase;
     319  DataSize := DataSizeBase;
     320  AddrSizeBase := Cpu.AddrSizeBase;
     321  AddrSize := AddrSizeBase;
    327322end;
    328323

  • branches/virtualcpu4/UMachine.pas

    r179 r182  
    5050  Cpu.OnInput := CpuInput;
    5151  Cpu.OnOutput := CpuOutput;
    52   Cpu.DataSize := bw32;
    53   Cpu.AddrSize := bw32;
     52  Cpu.DataSizeBase := bw32;
     53  Cpu.AddrSizeBase := bw32;
    5454  Screen := TScreen.Create;
    5555  Screen.Size := Point(320, 240);

  • branches/virtualcpu4/virtucpu4.lpi

    r181 r182  
    103103        <IsPartOfProject Value="True"/>
    104104        <ComponentName Value="FormDisassembler"/>
     105        <HasResources Value="True"/>
    105106        <ResourceBaseClass Value="Form"/>
    106107      </Unit6>
    … …  
    109110        <IsPartOfProject Value="True"/>
    110111        <ComponentName Value="FormMemory"/>
     112        <HasResources Value="True"/>
    111113        <ResourceBaseClass Value="Form"/>
    112114      </Unit7>
    … …  
    115117        <IsPartOfProject Value="True"/>
    116118        <ComponentName Value="FormCpuState"/>
     119        <HasResources Value="True"/>
    117120        <ResourceBaseClass Value="Form"/>
    118121      </Unit8>
    … …  
    121124        <IsPartOfProject Value="True"/>
    122125        <ComponentName Value="FormScreen"/>
     126        <HasResources Value="True"/>
    123127        <ResourceBaseClass Value="Form"/>
    124128      </Unit9>
    … …  
    127131        <IsPartOfProject Value="True"/>
    128132        <ComponentName Value="FormConsole"/>
     133        <HasResources Value="True"/>
    129134        <ResourceBaseClass Value="Form"/>
    130135      </Unit10>
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