Changeset 159 for branches/virtualcpu3

Timestamp:

Apr 25, 2018, 11:31:04 AM (7 years ago)

Author:

chronos

Message:

• Added: Instruction writer class.
• Added: Support for lower data width memory operations.

Location:

branches/virtualcpu3

Files:

• UFormMain.pas (modified) (2 diffs)
• UMachine.pas (modified) (15 diffs)

branches/virtualcpu3/UFormMain.pas

@@ -36 +36 @@
   TCPU32 = specialize TCPU<Integer>;
   TCPU64 = specialize TCPU<Int64>;
+  //TCPU128 = specialize TCPU<Int128>;
+  TInstWriter8 = specialize TInstructionWriter<ShortInt>;
+  TInstWriter16 = specialize TInstructionWriter<SmallInt>;
+  TInstWriter32 = specialize TInstructionWriter<Integer>;
+  TInstWriter64 = specialize TInstructionWriter<Int64>;
+  //TInstWriter128 = specialize TInstructionWriter<Int128>;
 var
   CPU8: TCPU8;
@@ -41 +47 @@
   CPU32: TCPU32;
   CPU64: TCPU64;
+  Writer8: TInstWriter8;
+  Writer16: TInstWriter16;
+  Writer32: TInstWriter32;
+  Writer64: TInstWriter64;
 begin
   CPU8 := TCPU8.Create;
+  Writer8 := TInstWriter8.Create;
+  Writer8.Machine := CPU8;
+  Writer8.AddLoadConst(0, 1);
+  Writer8.AddHalt;
+  Writer8.Free;
   CPU8.Run;
   CPU8.Free;
 
   CPU16 := TCPU16.Create;
+  Writer16 := TInstWriter16.Create;
+  Writer16.Machine := CPU16;
+  Writer16.AddLoadConst(0, 1);
+  Writer16.AddHalt;
+  Writer16.Free;
   CPU16.Run;
   CPU16.Free;
 
   CPU32 := TCPU32.Create;
+  Writer32 := TInstWriter32.Create;
+  Writer32.Machine := CPU32;
+  Writer32.AddLoadConst(0, 1);
+  Writer32.AddHalt;
+  Writer32.Free;
   CPU32.Run;
   CPU32.Free;
 
   CPU64 := TCPU64.Create;
+  Writer64 := TInstWriter64.Create;
+  Writer64.Machine := CPU64;
+  Writer64.AddLoadConst(0, 1);
+  Writer64.AddHalt;
+  Writer64.Free;
   CPU64.Run;
   CPU64.Free;

branches/virtualcpu3/UMachine.pas

@@ -12 +12 @@
 {$DEFINE EXT_GENERAL}
 {$DEFINE EXT_BIT}
+//{$DEFINE EXT_LOWER_WIDTH}
 
 // Extension dependencies
@@ -30 +31 @@
     opIn, opOut, opXchg, opXor, opOr, opAnd, opJpc, opJrc,
     opTstZ, opTstNZ, opTstC, opTstNC, opLDMD, opSTMD, opLdir, opLddr,
-    opBitSet, opBitRes, opBitGet, opBitPut);
+    opBitSet, opBitRes, opBitGet, opBitPut,
+    opPrefix8, opPrefix16, opPrefix32, opPrefix64);
 
   TOpcodeHandler = procedure of object;
+
+  TDataWidth = (dwNative, dw8, dw16, dw32, dw64, dw128);
 
   // Goals: Simple to implement, fast execution
@@ -54 +58 @@
     OpcodeHandlers: array[TOpcode] of TOpcodeHandler;
     function ReadNext: T;
+    {$IFDEF EXT_LOWER_WIDTH}
+    function ReadNext8: ShortInt;
+    function ReadNext16: SmallInt;
+    function ReadNext32: Integer;
+    function ReadNext64: Int64;
+    {$ENDIF}
     function ReadOpcode: TOpcodeIndex;
     function ReadReg: TRegIndex;
@@ -79 +89 @@
     procedure OpcodeTestNotCarry;
     procedure OpcodeTestCarry;
+    {$IFDEF EXT_LOWER_WIDTH}
+    procedure OpcodePrefix8;
+    procedure OpcodePrefix16;
+    procedure OpcodePrefix32;
+    procedure OpcodePrefix64;
+    {$ENDIF}
     {$IFDEF EXT_GENERAL}
     procedure OpcodeExchange;
@@ -127 +143 @@
     Memory: array of Byte;
     IP: T;
+    DataWidth: TDataWidth;
     {$IFDEF EXT_STACK}
     SP: T;
@@ -136 +153 @@
   end;
 
+  { TInstructionWriter }
+
+  generic TInstructionWriter<T> = class
+  type
+    PT = ^T;
+    TOpcodeIndex = Byte;
+    POpcodeIndex = ^TOpcodeIndex;
+    TRegIndex = Byte;
+    PRegIndex = ^TRegIndex;
+  var
+    Addr: Integer;
+    Machine: specialize TCPU<T>;
+    procedure AddLoadConst(Reg: TRegIndex; Value: T);
+    {$IFDEF EXT_LOWER_WIDTH}
+    procedure AddLoadConst8(Reg: TRegIndex; Value: ShortInt);
+    procedure AddLoadConst16(Reg: TRegIndex; Value: SmallInt);
+    procedure AddLoadConst32(Reg: TRegIndex; Value: Integer);
+    procedure AddLoadConst64(Reg: TRegIndex; Value: Int64);
+    {$ENDIF}
+    procedure AddNop;
+    procedure AddHalt;
+    procedure AddReg(Reg: TRegIndex);
+    procedure AddOpcode(Opcode: TOpcode);
+    procedure AddData(Value: T);
+    {$IFDEF EXT_LOWER_WIDTH}
+    procedure AddData8(Value: ShortInt);
+    procedure AddData16(Value: SmallInt);
+    procedure AddData32(Value: Integer);
+    procedure AddData64(Value: Int64);
+    {$ENDIF}
+  end;
+
 
 implementation
+
+{ TInstructionWriter }
+
+procedure TInstructionWriter.AddLoadConst(Reg: TRegIndex; Value: T);
+begin
+  AddOpcode(opLDC);
+  AddReg(Reg);
+  AddData(Value);
+end;
+
+{$IFDEF EXT_LOWER_WIDTH}
+procedure TInstructionWriter.AddLoadConst8(Reg: TRegIndex; Value: ShortInt);
+begin
+  AddOpcode(opPrefix8);
+  AddOpcode(opLDC);
+  AddData8(Reg);
+  AddData8(Value);
+end;
+
+procedure TInstructionWriter.AddLoadConst16(Reg: TRegIndex; Value: SmallInt);
+begin
+  AddOpcode(opPrefix16);
+  AddOpcode(opLDC);
+  AddReg(Reg);
+  AddData16(Value);
+end;
+
+procedure TInstructionWriter.AddLoadConst32(Reg: TRegIndex; Value: Integer);
+begin
+  AddOpcode(opPrefix32);
+  AddOpcode(opLDC);
+  AddReg(Reg);
+  AddData32(Value);
+end;
+
+procedure TInstructionWriter.AddLoadConst64(Reg: TRegIndex; Value: Int64);
+begin
+  AddOpcode(opPrefix64);
+  AddOpcode(opLDC);
+  AddReg(Reg);
+  AddData64(Value);
+end;
+{$ENDIF}
+
+procedure TInstructionWriter.AddNop;
+begin
+  AddOpcode(opNop);
+end;
+
+procedure TInstructionWriter.AddHalt;
+begin
+  AddOpcode(opHalt);
+end;
+
+procedure TInstructionWriter.AddReg(Reg: TRegIndex);
+begin
+  PRegIndex(@(Machine.Memory[Addr]))^ := Reg;
+  Inc(Addr, SizeOf(TRegIndex));
+end;
+
+procedure TInstructionWriter.AddOpcode(Opcode: TOpcode);
+begin
+  POpcodeIndex(@(Machine.Memory[Addr]))^ := TOpcodeIndex(Opcode);
+  Inc(Addr, SizeOf(TOpcodeIndex));
+end;
+
+procedure TInstructionWriter.AddData(Value: T);
+begin
+  PT(@(Machine.Memory[Addr]))^ := Value;
+  Inc(Addr, SizeOf(T));
+end;
+
+{$IFDEF EXT_LOWER_WIDTH}
+procedure TInstructionWriter.AddData8(Value: ShortInt);
+begin
+  PShortInt(@(Machine.Memory[Addr]))^ := Value;
+  Inc(Addr, SizeOf(ShortInt));
+end;
+
+procedure TInstructionWriter.AddData16(Value: SmallInt);
+begin
+  PSmallInt(@(Machine.Memory[Addr]))^ := Value;
+  Inc(Addr, SizeOf(SmallInt));
+end;
+
+procedure TInstructionWriter.AddData32(Value: Integer);
+begin
+  PInteger(@(Machine.Memory[Addr]))^ := Value;
+  Inc(Addr, SizeOf(Integer));
+end;
+
+procedure TInstructionWriter.AddData64(Value: Int64);
+begin
+  PInt64(@(Machine.Memory[Addr]))^ := Value;
+  Inc(Addr, SizeOf(Int64));
+end;
+{$ENDIF}
 
 { TCPU }
@@ -146 +292 @@
   Inc(IP, SizeOf(T));
 end;
+
+{$IFDEF EXT_LOWER_WIDTH}
+function TCPU.ReadNext8: ShortInt;
+begin
+  Result := PShortInt(@Memory[IP])^;
+  Inc(IP, SizeOf(ShortInt));
+end;
+
+function TCPU.ReadNext16: SmallInt;
+begin
+  Result := PSmallInt(@Memory[IP])^;
+  Inc(IP, SizeOf(SmallInt));
+end;
+
+function TCPU.ReadNext32: Integer;
+begin
+  Result := PInteger(@Memory[IP])^;
+  Inc(IP, SizeOf(Integer));
+end;
+
+function TCPU.ReadNext64: Int64;
+begin
+  Result := PInt64(@Memory[IP])^;
+  Inc(IP, SizeOf(Int64));
+end;
+{$ENDIF}
 
 function TCPU.ReadOpcode: TOpcodeIndex;
@@ -165 +337 @@
   SP := Length(Memory);
   {$ENDIF}
+  {$IFDEF EXT_LOWER_WIDTH}
+  DataWidth := dwNative;
+  {$ENDIF}
   Terminated := False;
   while not Terminated do
@@ -200 +375 @@
 begin
   Reg := ReadReg;
+  {$IFDEF EXT_LOWER_WIDTH}
+  case DataWidth of
+    dwNative: Registers[Reg] := ReadNext;
+    dw8: Registers[Reg] := ReadNext8;
+    dw16: Registers[Reg] := ReadNext16;
+    dw32: Registers[Reg] := ReadNext32;
+    dw64: Registers[Reg] := ReadNext64;
+  end;
+  {$ELSE}
   Registers[Reg] := ReadNext;
+  {$ENDIF}
 end;
 
@@ -209 +394 @@
   Dest := ReadReg;
   Src := ReadReg;
+  {$IFDEF EXT_LOWER_WIDTH}
+  case DataWidth of
+    dwNative: Registers[Dest] := PT(@Memory[Registers[Src]])^;
+    dw8: Registers[Dest] := PShortInt(@Memory[Registers[Src]])^;
+    dw16: Registers[Dest] := PSmallInt(@Memory[Registers[Src]])^;
+    dw32: Registers[Dest] := PInteger(@Memory[Registers[Src]])^;
+    dw64: Registers[Dest] := PInt64(@Memory[Registers[Src]])^;
+  end;
+  {$ELSE}
   Registers[Dest] := PT(@Memory[Registers[Src]])^;
+  {$ENDIF}
 end;
 
@@ -218 +413 @@
   Dest := ReadReg;
   Src := ReadReg;
+  {$IFDEF EXT_LOWER_WIDTH}
+  case DataWidth of
+    dwNative: PT(@Memory[Registers[Dest]])^ := Registers[Src];
+    dw8: PShortInt(@Memory[Registers[Dest]])^ := Registers[Src];
+    dw16: PSmallInt(@Memory[Registers[Dest]])^ := Registers[Src];
+    dw32: PInteger(@Memory[Registers[Dest]])^ := Registers[Src];
+    dw64: PInt64(@Memory[Registers[Dest]])^ := Registers[Src];
+  end;
+  {$ELSE}
   PT(@Memory[Registers[Dest]])^ := Registers[Src];
+  {$ENDIF}
 end;
 
@@ -467 +672 @@
   Condition := Registers[Reg2] > Registers[Reg1];
 end;
+
+{$IFDEF EXT_LOWER_WIDTH}
+procedure TCPU.OpcodePrefix8;
+begin
+  DataWidth := dw8;
+end;
+
+procedure TCPU.OpcodePrefix16;
+begin
+  DataWidth := dw16;
+end;
+
+procedure TCPU.OpcodePrefix32;
+begin
+  DataWidth := dw32;
+end;
+
+procedure TCPU.OpcodePrefix64;
+begin
+  DataWidth := dw64;
+end;
+{$ENDIF}
 
 procedure TCPU.OpcodeTestNotZero;
@@ -520 +747 @@
   end;
 end;
+{$ENDIF}
 
 {$IFDEF EXT_BIT}
@@ -562 +790 @@
     Registers[Reg] := Registers[Reg] or (1 shl Registers[Bit]);
 end;
-{$ENDIF}
-
 {$ENDIF}
 
@@ -577 +803 @@
     else raise Exception.Create('Missing handler for opcode + ' + IntToStr(Integer(Opcode)));
   end else raise Exception.Create('Unknown opcode: ' + IntToStr(Integer(Opcode)));
+  {$IFDEF EXT_LOWER_WIDTH}
+  if (Opcode <> opPrefix8) and (Opcode <> opPrefix16) and (Opcode <> opPrefix32) and
+  (Opcode <> opPrefix64) then
+    DataWidth := dwNative;
+  {$ENDIF}
 end;