| 1 | unit Cpu;
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| 2 |
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| 3 | interface
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| 4 |
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| 5 | uses
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| 6 | Classes, SysUtils;
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| 7 |
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| 8 | type
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| 9 | TInstruction = (inNop, inHalt, inSet, inCopy, inInc, inDec, inLoad, inStore,
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| 10 | inAdd, inSub, inIn, inOut, inJump, inJumpZero, inJumpNotZero, inPush, inPop,
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| 11 | inCall, inRet, inAnd, inOr, inXor, inShl, inShr, inMul, inDiv, inMod,
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| 12 | inJumpRel, inLoadIndex, inStoreIndex, inLoadCpu, inStoreCpu, inEi, inDi);
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| 13 |
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| 14 | TInteger = Integer;
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| 15 |
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| 16 | TCpuThread = class;
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| 17 | TOutputEvent = procedure (Device, Port: TInteger; Value: TInteger) of object;
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| 18 | TInputEvent = function (Device, Port: TInteger): TInteger of object;
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| 19 |
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| 20 | { TCpuStatus }
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| 21 |
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| 22 | TCpuStatus = packed record
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| 23 | InterruptEnabled: Boolean;
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| 24 | UserMode: Boolean;
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| 25 | UserModeWasActive: Boolean;
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| 26 | function GetInteger: TInteger;
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| 27 | procedure SetInteger(Value: TInteger);
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| 28 | end;
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| 29 |
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| 30 | TIntegerArray = array of TInteger;
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| 31 |
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| 32 | TMemoryBlock = record
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| 33 | Base: TIntegerArray;
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| 34 | Size: TInteger;
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| 35 | end;
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| 36 |
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| 37 | TMemoryBlockIndex = (mbCode, mbData, mbStack, mbInterrupt);
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| 38 | TInstructionHandler = procedure of object;
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| 39 | TSystemInterrupt = (siReset, siUserIn, siUserOut, siUserInvalidMemory,
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| 40 | siPrivilegedInstruction);
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| 41 | TCpuRegister = (crIP, crSP, crStatusRegister, crUserMemoryBase, crUserMemorySize);
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| 42 |
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| 43 | { TCpu }
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| 44 |
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| 45 | TCpu = class
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| 46 | private
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| 47 | FBaseMemory: TMemoryBlock;
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| 48 | FUserMemory: TMemoryBlock;
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| 49 | FMemory: TMemoryBlock;
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| 50 | FRunning: Boolean;
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| 51 | FThread: TCpuThread;
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| 52 | FOnInput: TInputEvent;
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| 53 | FOnOutput: TOutputEvent;
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| 54 | FNextInterupt: TInteger;
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| 55 | FHalted: Boolean;
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| 56 | FTicks: Integer;
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| 57 | FInstructionHandlers: array[TInstruction] of TInstructionHandler;
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| 58 | function GetMemory: TIntegerArray;
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| 59 | procedure InstructionNop;
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| 60 | procedure InstructionHalt;
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| 61 | procedure InstructionSet;
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| 62 | procedure InstructionCopy;
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| 63 | procedure InstructionLoad;
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| 64 | procedure InstructionStore;
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| 65 | procedure InstructionInc;
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| 66 | procedure InstructionDec;
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| 67 | procedure InstructionAdd;
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| 68 | procedure InstructionSub;
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| 69 | procedure InstructionIn;
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| 70 | procedure InstructionOut;
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| 71 | procedure InstructionJump;
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| 72 | procedure InstructionJumpRel;
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| 73 | procedure InstructionJumpZero;
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| 74 | procedure InstructionJumpNotZero;
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| 75 | procedure InstructionPush;
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| 76 | procedure InstructionPop;
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| 77 | procedure InstructionCall;
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| 78 | procedure InstructionRet;
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| 79 | procedure InstructionReti;
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| 80 | procedure InstructionAnd;
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| 81 | procedure InstructionOr;
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| 82 | procedure InstructionXor;
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| 83 | procedure InstructionShl;
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| 84 | procedure InstructionShr;
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| 85 | procedure InstructionMod;
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| 86 | procedure InstructionDiv;
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| 87 | procedure InstructionMul;
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| 88 | procedure InstructionLoadIndex;
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| 89 | procedure InstructionStoreIndex;
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| 90 | procedure InstructionLoadCpu;
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| 91 | procedure InstructionStoreCpu;
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| 92 | procedure InstructionEi;
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| 93 | procedure InstructionDi;
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| 94 | procedure SetMemory(AValue: TIntegerArray);
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| 95 | procedure SetRunning(AValue: Boolean);
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| 96 | procedure CheckInterreupts;
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| 97 | procedure Push(Value: TInteger);
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| 98 | function Pop: TInteger;
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| 99 | procedure StoreContext;
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| 100 | procedure LoadContext;
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| 101 | procedure InitInstructions;
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| 102 | procedure ActivateUserMode;
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| 103 | procedure DeactivateUserMode;
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| 104 | public
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| 105 | InstructionPointer: TInteger; // Instruction Pointer
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| 106 | StackPointer: TInteger; // Stack Pointer
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| 107 | StatusRegister: TCpuStatus; // Status Register
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| 108 | R: array of TInteger;
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| 109 | function ReadNext: TInteger;
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| 110 | procedure WriteNext(Value: TInteger);
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| 111 | procedure Step;
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| 112 | procedure Start;
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| 113 | procedure Stop;
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| 114 | procedure Reset;
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| 115 | procedure Interrupt(Index: TSystemInterrupt); overload;
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| 116 | procedure Interrupt(Index: TInteger); overload;
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| 117 | constructor Create;
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| 118 | destructor Destroy; override;
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| 119 | property Ticks: Integer read FTicks;
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| 120 | property Memory: TIntegerArray read GetMemory write SetMemory;
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| 121 | property OnInput: TInputEvent read FOnInput write FOnInput;
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| 122 | property OnOutput: TOutputEvent read FOnOutput write FOnOutput;
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| 123 | property Running: Boolean read FRunning write SetRunning;
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| 124 | property Halted: Boolean read FHalted;
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| 125 | end;
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| 126 |
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| 127 | { TCpuThread }
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| 128 |
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| 129 | TCpuThread = class(TThread)
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| 130 | Cpu: TCpu;
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| 131 | procedure Execute; override;
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| 132 | end;
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| 133 |
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| 134 |
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| 135 | implementation
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| 136 |
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| 137 | { TCpuStatus }
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| 138 |
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| 139 | function TCpuStatus.GetInteger: TInteger;
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| 140 | begin
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| 141 |
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| 142 | end;
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| 143 |
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| 144 | procedure TCpuStatus.SetInteger(Value: TInteger);
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| 145 | begin
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| 146 |
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| 147 | end;
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| 148 |
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| 149 | { TCpuThread }
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| 150 |
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| 151 | procedure TCpuThread.Execute;
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| 152 | begin
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| 153 | repeat
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| 154 | if not Cpu.Halted then Cpu.Step
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| 155 | else Sleep(1);
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| 156 | Cpu.CheckInterreupts;
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| 157 | until Terminated;
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| 158 | end;
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| 159 |
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| 160 | { TCpu }
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| 161 |
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| 162 | procedure TCpu.SetRunning(AValue: Boolean);
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| 163 | begin
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| 164 | if FRunning = AValue then Exit;
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| 165 | if AValue then Start
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| 166 | else Stop;
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| 167 | end;
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| 168 |
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| 169 | procedure TCpu.InstructionNop;
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| 170 | begin
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| 171 | // No operation
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| 172 | end;
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| 173 |
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| 174 | function TCpu.GetMemory: TIntegerArray;
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| 175 | begin
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| 176 | Result := FBaseMemory.Base;
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| 177 | end;
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| 178 |
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| 179 | procedure TCpu.InstructionHalt;
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| 180 | begin
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| 181 | FHalted := True;
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| 182 | end;
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| 183 |
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| 184 | procedure TCpu.InstructionSet;
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| 185 | begin
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| 186 | R[ReadNext] := ReadNext;
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| 187 | end;
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| 188 |
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| 189 | procedure TCpu.InstructionCopy;
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| 190 | begin
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| 191 | R[ReadNext] := R[ReadNext];
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| 192 | end;
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| 193 |
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| 194 | procedure TCpu.InstructionLoad;
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| 195 | begin
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| 196 | R[ReadNext] := FMemory.Base[R[ReadNext]];
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| 197 | end;
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| 198 |
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| 199 | procedure TCpu.InstructionStore;
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| 200 | begin
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| 201 | FMemory.Base[R[ReadNext]] := R[ReadNext];
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| 202 | end;
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| 203 |
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| 204 | procedure TCpu.InstructionInc;
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| 205 | begin
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| 206 | Inc(R[ReadNext]);
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| 207 | end;
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| 208 |
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| 209 | procedure TCpu.InstructionDec;
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| 210 | begin
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| 211 | Dec(R[ReadNext]);
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| 212 | end;
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| 213 |
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| 214 | procedure TCpu.InstructionAdd;
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| 215 | var
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| 216 | Index: TInteger;
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| 217 | begin
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| 218 | Index := ReadNext;
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| 219 | R[Index] := R[Index] + R[ReadNext];
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| 220 | end;
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| 221 |
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| 222 | procedure TCpu.InstructionSub;
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| 223 | var
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| 224 | Index: TInteger;
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| 225 | begin
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| 226 | Index := ReadNext;
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| 227 | R[Index] := R[Index] - R[ReadNext];
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| 228 | end;
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| 229 |
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| 230 | procedure TCpu.InstructionIn;
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| 231 | var
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| 232 | Index: TInteger;
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| 233 | Device: TInteger;
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| 234 | Port: TInteger;
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| 235 | begin
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| 236 | Index := ReadNext;
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| 237 | Device := R[ReadNext];
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| 238 | Port := R[ReadNext];
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| 239 | if StatusRegister.UserMode then begin
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| 240 | Interrupt(siUserIn);
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| 241 | end else begin
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| 242 | if Assigned(FOnInput) then R[Index] := FOnInput(Device, Port);
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| 243 | end;
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| 244 | end;
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| 245 |
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| 246 | procedure TCpu.InstructionOut;
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| 247 | var
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| 248 | Device: TInteger;
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| 249 | Port: TInteger;
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| 250 | Index: TInteger;
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| 251 | begin
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| 252 | Device := R[ReadNext];
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| 253 | Port := R[ReadNext];
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| 254 | Index := ReadNext;
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| 255 | if StatusRegister.UserMode then begin
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| 256 | Interrupt(siUserOut);
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| 257 | end else begin
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| 258 | if Assigned(FOnOutput) then FOnOutput(Device, Port, R[Index]);
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| 259 | end;
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| 260 | end;
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| 261 |
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| 262 | procedure TCpu.InstructionJump;
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| 263 | begin
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| 264 | InstructionPointer := ReadNext;
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| 265 | end;
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| 266 |
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| 267 | procedure TCpu.InstructionJumpRel;
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| 268 | begin
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| 269 | InstructionPointer := InstructionPointer + ReadNext;
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| 270 | end;
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| 271 |
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| 272 | procedure TCpu.InstructionJumpZero;
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| 273 | var
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| 274 | Index: TInteger;
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| 275 | Address: TInteger;
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| 276 | begin
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| 277 | Index := ReadNext;
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| 278 | Address := ReadNext;
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| 279 | if R[Index] = 0 then InstructionPointer := Address;
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| 280 | end;
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| 281 |
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| 282 | procedure TCpu.InstructionJumpNotZero;
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| 283 | var
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| 284 | Index: TInteger;
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| 285 | Address: TInteger;
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| 286 | begin
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| 287 | Index := ReadNext;
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| 288 | Address := ReadNext;
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| 289 | if R[Index] <> 0 then InstructionPointer := Address;
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| 290 | end;
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| 291 |
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| 292 | procedure TCpu.InstructionPush;
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| 293 | begin
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| 294 | Push(R[ReadNext]);
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| 295 | end;
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| 296 |
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| 297 | procedure TCpu.InstructionPop;
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| 298 | begin
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| 299 | R[ReadNext] := Pop;
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| 300 | end;
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| 301 |
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| 302 | procedure TCpu.InstructionCall;
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| 303 | var
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| 304 | Address: TInteger;
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| 305 | begin
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| 306 | Address := ReadNext;
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| 307 | Push(InstructionPointer);
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| 308 | InstructionPointer := Address;
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| 309 | end;
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| 310 |
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| 311 | procedure TCpu.InstructionRet;
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| 312 | begin
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| 313 | InstructionPointer := Pop;
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| 314 | end;
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| 315 |
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| 316 | procedure TCpu.InstructionReti;
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| 317 | begin
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| 318 | if StatusRegister.UserMode then begin
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| 319 | Interrupt(siPrivilegedInstruction);
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| 320 | Exit;
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| 321 | end;
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| 322 | if StatusRegister.UserModeWasActive then ActivateUserMode;
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| 323 | StatusRegister.InterruptEnabled := True;
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| 324 | InstructionPointer := Pop;
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| 325 | end;
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| 326 |
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| 327 | procedure TCpu.InstructionAnd;
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| 328 | var
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| 329 | Index: TInteger;
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| 330 | begin
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| 331 | Index := ReadNext;
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| 332 | R[Index] := R[Index] and R[ReadNext];
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| 333 | end;
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| 334 |
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| 335 | procedure TCpu.InstructionOr;
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| 336 | var
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| 337 | Index: TInteger;
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| 338 | begin
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| 339 | Index := ReadNext;
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| 340 | R[Index] := R[Index] or R[ReadNext];
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| 341 | end;
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| 342 |
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| 343 | procedure TCpu.InstructionXor;
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| 344 | var
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| 345 | Index: TInteger;
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| 346 | begin
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| 347 | Index := ReadNext;
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| 348 | R[Index] := R[Index] xor R[ReadNext];
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| 349 | end;
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| 350 |
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| 351 | procedure TCpu.InstructionShl;
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| 352 | var
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| 353 | Index: TInteger;
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| 354 | begin
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| 355 | Index := ReadNext;
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| 356 | R[Index] := R[Index] shl R[ReadNext];
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| 357 | end;
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| 358 |
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| 359 | procedure TCpu.InstructionShr;
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| 360 | var
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| 361 | Index: TInteger;
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| 362 | begin
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| 363 | Index := ReadNext;
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| 364 | R[Index] := R[Index] shr R[ReadNext];
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| 365 | end;
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| 366 |
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| 367 | procedure TCpu.InstructionMod;
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| 368 | var
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| 369 | Index: TInteger;
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| 370 | begin
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| 371 | Index := ReadNext;
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| 372 | R[Index] := R[Index] mod R[ReadNext];
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| 373 | end;
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| 374 |
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| 375 | procedure TCpu.InstructionDiv;
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| 376 | var
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| 377 | Index: TInteger;
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| 378 | begin
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| 379 | Index := ReadNext;
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| 380 | R[Index] := R[Index] div R[ReadNext];
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| 381 | end;
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| 382 |
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| 383 | procedure TCpu.InstructionMul;
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| 384 | var
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| 385 | Index: TInteger;
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| 386 | begin
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| 387 | Index := ReadNext;
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| 388 | R[Index] := R[Index] * R[ReadNext];
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| 389 | end;
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| 390 |
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| 391 | procedure TCpu.InstructionLoadIndex;
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| 392 | begin
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| 393 | R[ReadNext] := FMemory.Base[R[ReadNext] + ReadNext];
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| 394 | end;
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| 395 |
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| 396 | procedure TCpu.InstructionStoreIndex;
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| 397 | begin
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| 398 | FMemory.Base[R[ReadNext] + ReadNext] := R[ReadNext];
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| 399 | end;
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| 400 |
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| 401 | procedure TCpu.InstructionLoadCpu;
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| 402 | var
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| 403 | Index: TInteger;
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| 404 | I: TInteger;
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| 405 | begin
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| 406 | R[ReadNext] := FMemory.Base[R[ReadNext]];
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| 407 | Index := ReadNext;
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| 408 | I := ReadNext;
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| 409 | case TCpuRegister(I) of
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| 410 | crIP: R[Index] := InstructionPointer;
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| 411 | crSP: R[Index] := StackPointer;
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| 412 | crStatusRegister: R[Index] := StatusRegister.GetInteger;
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| 413 | crUserMemoryBase: R[Index] := Pointer(FUserMemory.Base) - Pointer(FBaseMemory.Base);
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| 414 | crUserMemorySize: R[Index] := FUserMemory.Size;
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| 415 | end;
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| 416 | end;
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| 417 |
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| 418 | procedure TCpu.InstructionStoreCpu;
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| 419 | var
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| 420 | Index: TInteger;
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| 421 | I: TInteger;
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| 422 | begin
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| 423 | if StatusRegister.UserMode then begin
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| 424 | Interrupt(siPrivilegedInstruction);
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| 425 | Exit;
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| 426 | end;
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| 427 | R[ReadNext] := FMemory.Base[R[ReadNext]];
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| 428 | Index := ReadNext;
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| 429 | I := ReadNext;
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| 430 | case TCpuRegister(I) of
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| 431 | crIP: InstructionPointer := R[Index];
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| 432 | crSP: StackPointer := R[Index];
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| 433 | crStatusRegister: StatusRegister.SetInteger(R[Index]);
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| 434 | crUserMemoryBase: FUserMemory.Base := Pointer(FBaseMemory.Base) + R[Index];
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| 435 | crUserMemorySize: FUserMemory.Size := R[Index];
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| 436 | end;
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| 437 | end;
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| 438 |
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| 439 | procedure TCpu.InstructionEi;
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| 440 | begin
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| 441 | if StatusRegister.UserMode then begin
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| 442 | Interrupt(siPrivilegedInstruction);
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| 443 | Exit;
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| 444 | end;
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| 445 | StatusRegister.InterruptEnabled := True;
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| 446 | end;
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| 447 |
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| 448 | procedure TCpu.InstructionDi;
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| 449 | begin
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| 450 | if StatusRegister.UserMode then begin
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| 451 | Interrupt(siPrivilegedInstruction);
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| 452 | Exit;
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| 453 | end;
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| 454 | StatusRegister.InterruptEnabled := False;
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| 455 | end;
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| 456 |
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| 457 | procedure TCpu.SetMemory(AValue: TIntegerArray);
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| 458 | begin
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| 459 | if (FBaseMemory.Base = AValue) and (FBaseMemory.Size = Length(AValue)) then Exit;
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| 460 | FBaseMemory.Base := AValue;
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| 461 | FBaseMemory.Size := Length(AValue);
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| 462 | end;
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| 463 |
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| 464 | procedure TCpu.CheckInterreupts;
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| 465 | begin
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| 466 | if StatusRegister.InterruptEnabled and (FNextInterupt <> -1) then begin
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| 467 | Push(InstructionPointer);
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| 468 | if StatusRegister.UserMode then DeactivateUserMode;
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| 469 | InstructionPointer := FMemory.Base[FNextInterupt];
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| 470 | StatusRegister.InterruptEnabled := False;
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|---|
| 471 | FNextInterupt := -1;
|
|---|
| 472 | FHalted := False;
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|---|
| 473 | end;
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|---|
| 474 | end;
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|---|
| 475 |
|
|---|
| 476 | procedure TCpu.Push(Value: TInteger);
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|---|
| 477 | begin
|
|---|
| 478 | Dec(StackPointer);
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|---|
| 479 | FMemory.Base[StackPointer] := Value;
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|---|
| 480 | end;
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|---|
| 481 |
|
|---|
| 482 | function TCpu.Pop: TInteger;
|
|---|
| 483 | begin
|
|---|
| 484 | Result := FMemory.Base[StackPointer];
|
|---|
| 485 | Inc(StackPointer);
|
|---|
| 486 | end;
|
|---|
| 487 |
|
|---|
| 488 | procedure TCpu.StoreContext;
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|---|
| 489 | var
|
|---|
| 490 | I: Integer;
|
|---|
| 491 | begin
|
|---|
| 492 | for I := 0 to Length(R) - 1 do
|
|---|
| 493 | Push(R[I]);
|
|---|
| 494 | end;
|
|---|
| 495 |
|
|---|
| 496 | procedure TCpu.LoadContext;
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|---|
| 497 | var
|
|---|
| 498 | I: Integer;
|
|---|
| 499 | begin
|
|---|
| 500 | for I := Length(R) - 1 downto 0 do
|
|---|
| 501 | R[I] := Pop;
|
|---|
| 502 | end;
|
|---|
| 503 |
|
|---|
| 504 | procedure TCpu.InitInstructions;
|
|---|
| 505 | begin
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|---|
| 506 | FInstructionHandlers[inNop] := InstructionNop;
|
|---|
| 507 | FInstructionHandlers[inHalt] := InstructionHalt;
|
|---|
| 508 | FInstructionHandlers[inSet] := InstructionSet;
|
|---|
| 509 | FInstructionHandlers[inCopy] := InstructionCopy;
|
|---|
| 510 | FInstructionHandlers[inLoad] := InstructionLoad;
|
|---|
| 511 | FInstructionHandlers[inStore] := InstructionStore;
|
|---|
| 512 | FInstructionHandlers[inInc] := InstructionInc;
|
|---|
| 513 | FInstructionHandlers[inDec] := InstructionDec;
|
|---|
| 514 | FInstructionHandlers[inAdd] := InstructionAdd;
|
|---|
| 515 | FInstructionHandlers[inSub] := InstructionSub;
|
|---|
| 516 | FInstructionHandlers[inIn] := InstructionIn;
|
|---|
| 517 | FInstructionHandlers[inOut] := InstructionOut;
|
|---|
| 518 | FInstructionHandlers[inJump] := InstructionJump;
|
|---|
| 519 | FInstructionHandlers[inJumpRel] := InstructionJumpRel;
|
|---|
| 520 | FInstructionHandlers[inJumpZero] := InstructionJumpZero;
|
|---|
| 521 | FInstructionHandlers[inJumpNotZero] := InstructionJumpNotZero;
|
|---|
| 522 | FInstructionHandlers[inPush] := InstructionPush;
|
|---|
| 523 | FInstructionHandlers[inPop] := InstructionPop;
|
|---|
| 524 | FInstructionHandlers[inCall] := InstructionCall;
|
|---|
| 525 | FInstructionHandlers[inRet] := InstructionRet;
|
|---|
| 526 | FInstructionHandlers[inAnd] := InstructionAnd;
|
|---|
| 527 | FInstructionHandlers[inOr] := InstructionOr;
|
|---|
| 528 | FInstructionHandlers[inXor] := InstructionXor;
|
|---|
| 529 | FInstructionHandlers[inShl] := InstructionShl;
|
|---|
| 530 | FInstructionHandlers[inShr] := InstructionShr;
|
|---|
| 531 | FInstructionHandlers[inMul] := InstructionMul;
|
|---|
| 532 | FInstructionHandlers[inDiv] := InstructionDiv;
|
|---|
| 533 | FInstructionHandlers[inMod] := InstructionMod;
|
|---|
| 534 | FInstructionHandlers[inLoadIndex] := InstructionLoadIndex;
|
|---|
| 535 | FInstructionHandlers[inStoreIndex] := InstructionStoreIndex;
|
|---|
| 536 | FInstructionHandlers[inLoadCpu] := InstructionLoadCpu;
|
|---|
| 537 | FInstructionHandlers[inStoreCpu] := InstructionStoreCpu;
|
|---|
| 538 | FInstructionHandlers[inEi] := InstructionEi;
|
|---|
| 539 | FInstructionHandlers[inDi] := InstructionDi;
|
|---|
| 540 | end;
|
|---|
| 541 |
|
|---|
| 542 | procedure TCpu.ActivateUserMode;
|
|---|
| 543 | begin
|
|---|
| 544 | StatusRegister.UserMode := True;
|
|---|
| 545 | FMemory := FUserMemory;
|
|---|
| 546 | end;
|
|---|
| 547 |
|
|---|
| 548 | procedure TCpu.DeactivateUserMode;
|
|---|
| 549 | begin
|
|---|
| 550 | FMemory := FBaseMemory;
|
|---|
| 551 | StatusRegister.UserModeWasActive := StatusRegister.UserMode;
|
|---|
| 552 | StatusRegister.UserMode := False;
|
|---|
| 553 | end;
|
|---|
| 554 |
|
|---|
| 555 | function TCpu.ReadNext: TInteger;
|
|---|
| 556 | begin
|
|---|
| 557 | if InstructionPointer >= FMemory.Size then InstructionPointer := 0;
|
|---|
| 558 | Result := FMemory.Base[InstructionPointer];
|
|---|
| 559 | Inc(InstructionPointer);
|
|---|
| 560 | end;
|
|---|
| 561 |
|
|---|
| 562 | procedure TCpu.WriteNext(Value: TInteger);
|
|---|
| 563 | begin
|
|---|
| 564 | if InstructionPointer >= FMemory.Size then InstructionPointer := 0;
|
|---|
| 565 | FMemory.Base[InstructionPointer] := Value;
|
|---|
| 566 | Inc(InstructionPointer);
|
|---|
| 567 | end;
|
|---|
| 568 |
|
|---|
| 569 | procedure TCpu.Step;
|
|---|
| 570 | var
|
|---|
| 571 | Instruction: TInstruction;
|
|---|
| 572 | begin
|
|---|
| 573 | Instruction := TInstruction(ReadNext);
|
|---|
| 574 | if Assigned(FInstructionHandlers[Instruction]) then
|
|---|
| 575 | FInstructionHandlers[Instruction]
|
|---|
| 576 | else raise Exception.Create('Missing handler for instruction ' + IntToStr(Integer(Instruction)));
|
|---|
| 577 | Inc(FTicks);
|
|---|
| 578 | end;
|
|---|
| 579 |
|
|---|
| 580 | procedure TCpu.Start;
|
|---|
| 581 | begin
|
|---|
| 582 | if not Running then begin
|
|---|
| 583 | Reset;
|
|---|
| 584 | FThread := TCpuThread.Create(True);
|
|---|
| 585 | FThread.Cpu := Self;
|
|---|
| 586 | FThread.Start;
|
|---|
| 587 | FRunning := True;
|
|---|
| 588 | end;
|
|---|
| 589 | end;
|
|---|
| 590 |
|
|---|
| 591 | procedure TCpu.Stop;
|
|---|
| 592 | begin
|
|---|
| 593 | if Running then begin
|
|---|
| 594 | FHalted := True;
|
|---|
| 595 | FThread.Terminate;
|
|---|
| 596 | FThread.WaitFor;
|
|---|
| 597 | FreeAndNil(FThread);
|
|---|
| 598 | FRunning := False;
|
|---|
| 599 | end;
|
|---|
| 600 | end;
|
|---|
| 601 |
|
|---|
| 602 | procedure TCpu.Reset;
|
|---|
| 603 | var
|
|---|
| 604 | I: Integer;
|
|---|
| 605 | begin
|
|---|
| 606 | FMemory := FBaseMemory;
|
|---|
| 607 | FNextInterupt := -1;
|
|---|
| 608 | FHalted := False;
|
|---|
| 609 | FTicks := 0;
|
|---|
| 610 | InstructionPointer := FMemory.Base[Integer(siReset)];
|
|---|
| 611 | StackPointer := FMemory.Size;
|
|---|
| 612 | for I := 0 to Length(R) - 1 do
|
|---|
| 613 | R[I] := 0;
|
|---|
| 614 | end;
|
|---|
| 615 |
|
|---|
| 616 | procedure TCpu.Interrupt(Index: TSystemInterrupt);
|
|---|
| 617 | begin
|
|---|
| 618 | Interrupt(TInteger(Index));
|
|---|
| 619 | end;
|
|---|
| 620 |
|
|---|
| 621 | procedure TCpu.Interrupt(Index: TInteger);
|
|---|
| 622 | begin
|
|---|
| 623 | FNextInterupt := Index;
|
|---|
| 624 | end;
|
|---|
| 625 |
|
|---|
| 626 | constructor TCpu.Create;
|
|---|
| 627 | begin
|
|---|
| 628 | SetLength(R, 16);
|
|---|
| 629 | Memory := nil;
|
|---|
| 630 | InitInstructions;
|
|---|
| 631 | end;
|
|---|
| 632 |
|
|---|
| 633 | destructor TCpu.Destroy;
|
|---|
| 634 | begin
|
|---|
| 635 | Stop;
|
|---|
| 636 | inherited;
|
|---|
| 637 | end;
|
|---|
| 638 |
|
|---|
| 639 | end.
|
|---|
| 640 |
|
|---|