Changeset 59 for branches/ByteArray/Cpu.pas
- Timestamp:
- Nov 25, 2023, 11:47:52 PM (12 months ago)
- File:
-
- 1 edited
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branches/ByteArray/Cpu.pas
r57 r59 12 12 inLoadMem, inLoadMemSize, 13 13 inStoreMem, inStoreMemSize, 14 inLoadMemIndex, inLoadMemIndexSize, 15 inStoreMemIndex, inStoreMemIndexSize, 14 16 inInput, inInputSize, 15 17 inOutput, inOutputSize, … … 38 40 inCompare); 39 41 40 TRegIndex = (riA, riB, riC, riD, riE, riF, riG, riH);42 TRegIndex = Byte; 41 43 42 44 TInstructionEvent = procedure of object; … … 64 66 procedure InstructionStoreMem; 65 67 procedure InstructionStoreMemSize; 68 procedure InstructionLoadMemIndex; 69 procedure InstructionLoadMemIndexSize; 70 procedure InstructionStoreMemIndex; 71 procedure InstructionStoreMemIndexSize; 66 72 procedure InstructionJump; 67 73 procedure InstructionJumpSize; … … 213 219 procedure TCpu.InstructionLoadMem; 214 220 var 215 Address: TBigInt;216 RegIndex : TRegIndex;217 begin 218 RegIndex := ReadRegIndex;219 Address := Read(AddressWidth);220 Regs[RegIndex ] := Memory.Read(Address, DataWidth);221 RegIndex1: TRegIndex; 222 RegIndex2: TRegIndex; 223 begin 224 RegIndex1 := ReadRegIndex; 225 RegIndex2 := ReadRegIndex; 226 Regs[RegIndex1] := Memory.Read(Regs[RegIndex2], DataWidth); 221 227 end; 222 228 … … 224 230 var 225 231 DataSize: TBigIntSize; 226 AddressSize: TBigIntSize; 227 Address: TBigInt; 228 RegIndex: TRegIndex; 229 begin 230 DataSize := ReadSize; 231 AddressSize := Read(SizeOf(TBigIntSize)); 232 RegIndex := ReadRegIndex; 233 Address := Read(AddressSize); 234 Regs[RegIndex] := Memory.Read(Address, DataSize); 232 RegIndex1: TRegIndex; 233 RegIndex2: TRegIndex; 234 begin 235 DataSize := ReadSize; 236 RegIndex1 := ReadRegIndex; 237 RegIndex2 := ReadRegIndex; 238 Regs[RegIndex1] := Memory.Read(Regs[RegIndex2], DataSize); 235 239 end; 236 240 237 241 procedure TCpu.InstructionStoreMem; 238 242 var 239 Address: TBigInt;240 RegIndex : TRegIndex;241 begin 242 Address := Read(AddressWidth);243 RegIndex := ReadRegIndex;244 Memory.Write( Address, DataWidth, Regs[RegIndex]);243 RegIndex1: TRegIndex; 244 RegIndex2: TRegIndex; 245 begin 246 RegIndex1 := ReadRegIndex; 247 RegIndex2 := ReadRegIndex; 248 Memory.Write(Regs[RegIndex1], DataWidth, Regs[RegIndex2]); 245 249 end; 246 250 … … 248 252 var 249 253 DataSize: TBigIntSize; 250 AddressSize: TBigIntSize; 251 Address: TBigInt; 252 RegIndex: TRegIndex; 253 begin 254 DataSize := ReadSize; 255 AddressSize := Read(SizeOf(TBigIntSize)); 256 Address := Read(AddressSize); 257 RegIndex := ReadRegIndex; 258 Memory.Write(Address, DataSize, Regs[RegIndex]); 254 RegIndex1: TRegIndex; 255 RegIndex2: TRegIndex; 256 begin 257 DataSize := ReadSize; 258 RegIndex1 := ReadRegIndex; 259 RegIndex2 := ReadRegIndex; 260 Memory.Write(Regs[RegIndex1], DataSize, Regs[RegIndex2]); 261 end; 262 263 procedure TCpu.InstructionLoadMemIndex; 264 var 265 RegIndex1: TRegIndex; 266 RegIndex2: TRegIndex; 267 RelativeAddress: TBigInt; 268 begin 269 RegIndex1 := ReadRegIndex; 270 RegIndex2 := ReadRegIndex; 271 RelativeAddress := Read(AddressWidth); 272 Regs[RegIndex1] := Memory.Read(Regs[RegIndex2] + RelativeAddress, DataWidth); 273 end; 274 275 procedure TCpu.InstructionLoadMemIndexSize; 276 var 277 DataSize: TBigIntSize; 278 RegIndex1: TRegIndex; 279 RegIndex2: TRegIndex; 280 RelativeAddress: TBigInt; 281 begin 282 DataSize := ReadSize; 283 RegIndex1 := ReadRegIndex; 284 RegIndex2 := ReadRegIndex; 285 RelativeAddress := Read(AddressWidth); 286 Regs[RegIndex1] := Memory.Read(Regs[RegIndex2] + RelativeAddress, DataSize); 287 end; 288 289 procedure TCpu.InstructionStoreMemIndex; 290 var 291 RegIndex1: TRegIndex; 292 RegIndex2: TRegIndex; 293 RelativeAddress: TBigInt; 294 begin 295 RegIndex1 := ReadRegIndex; 296 RegIndex2 := ReadRegIndex; 297 RelativeAddress := Read(AddressWidth); 298 Memory.Write(Regs[RegIndex1] + RelativeAddress, DataWidth, Regs[RegIndex2]); 299 end; 300 301 procedure TCpu.InstructionStoreMemIndexSize; 302 var 303 DataSize: TBigIntSize; 304 RegIndex1: TRegIndex; 305 RegIndex2: TRegIndex; 306 RelativeAddress: TBigInt; 307 begin 308 DataSize := ReadSize; 309 RegIndex1 := ReadRegIndex; 310 RegIndex2 := ReadRegIndex; 311 RelativeAddress := Read(AddressWidth); 312 Memory.Write(Regs[RegIndex1] + RelativeAddress, DataSize, Regs[RegIndex2]); 259 313 end; 260 314 … … 603 657 FInstructions[inStoreMem] := InstructionStoreMem; 604 658 FInstructions[inStoreMemSize] := InstructionStoreMemSize; 659 FInstructions[inLoadMemIndex] := InstructionLoadMemIndex; 660 FInstructions[inLoadMemIndexSize] := InstructionLoadMemIndexSize; 661 FInstructions[inStoreMemIndex] := InstructionStoreMemIndex; 662 FInstructions[inStoreMemIndexSize] := InstructionStoreMemIndexSize; 605 663 FInstructions[inJump] := InstructionJump; 606 664 FInstructions[inJumpSize] := InstructionJumpSize; … … 802 860 - bit index 2048 (256 * 8) (8 + 3) bits = 2^11 803 861 862 LD R0, R1 863 LD2 R0, R1 864 LD.2 R0, R1 865 LD:2 R0, R1 866 LD D2, R0, R1 867 LD D2, A16, R0, (R1) 868 LD D2:A16: R0, (R1) 869 RET 870 RET2 871 RET.2 872 RET:2 873 RET A2 874 PUSH R0 875 PUSH2 R0 876 PUSH.2 R0 877 PUSH:2 R0 878 PUSH D2, R0 879 PUSH D2:R0 880 PUSH R0.2 881 PUSH R0:2 882 LD (R0), (R2) 883 LD D1, A2, (R0), (R2) 884 LDIR (R0), (R1), R2 885 LDIR D1, A2, (R0), (R1), R2 886 LDI 887 OUT (R0), R1 888 OUT D1, (R0), R1 889 OUT D1, A2, (R0), R1 804 890 805 891
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