source: trunk/Z80/Z80.pas

Last change on this file was 14, checked in by chronos, 3 weeks ago
  • Modified: Pausing CPU thread execution with event object instead of freeing thread object.
File size: 107.1 KB
Line 
1unit Z80;
2
3interface
4
5uses
6 Classes, SysUtils, SyncObjs, MemoryTypes, Base, Z80Instructions,
7 Generics.Collections, Generics.Defaults;
8
9type
10 TCpuZ80 = class;
11
12 { TCpuThread }
13
14 TCpuThread = class(TThread)
15 Cpu: TCpuZ80;
16 procedure Execute; override;
17 end;
18
19 TRegAF = record
20 case Byte of
21 0: (F, A: Byte);
22 1: (Value: Word);
23 end;
24
25 TRegBC = record
26 case Byte of
27 0: (C, B: Byte);
28 1: (Value: Word);
29 end;
30
31 TRegDE = record
32 case Byte of
33 0: (E, D: Byte);
34 1: (Value: Word);
35 end;
36
37 TRegHL = record
38 case Byte of
39 0: (L, H: Byte);
40 1: (Value: Word);
41 end;
42
43 { TCpuZ80 }
44
45 TCpuZ80 = class
46 private
47 FOnCall: TAddressEvent;
48 FOnInput: TReadEvent;
49 FOnMessage: TMessageEvent;
50 FOnOutput: TWriteEvent;
51 FOnRead: TReadEvent;
52 FOnReturn: TBaseEvent;
53 FOnStep: TBaseEvent;
54 FOnWrite: TWriteEvent;
55 FRunning: Boolean;
56 FThread: TCpuThread;
57 Instruction: TInstruction;
58 InstructionAddress: Word;
59 MessageText: string;
60 FEvent: TEvent;
61 FPaused: Boolean;
62 procedure Error(Message: string);
63 function GetCarry: Boolean;
64 function GetParityOverflow: Boolean;
65 function GetSignNegative: Boolean;
66 function GetZero: Boolean;
67 procedure SetCarry(AValue: Boolean);
68 procedure SetParityOverflow(AValue: Boolean);
69 procedure SetPaused(AValue: Boolean);
70 procedure SetSignNegative(AValue: Boolean);
71 procedure SetZero(AValue: Boolean);
72 procedure SetRunning(AValue: Boolean);
73 function DoRead(Address: Word): Byte;
74 function DoReadWord(Address: Word): Word;
75 procedure DoWrite(Address: Word; Data: Byte);
76 procedure DoWriteWord(Address: Word; Data: Word);
77 function DoInput(Address: Word): Byte;
78 procedure DoOutput(Address: Word; Data: Byte);
79 procedure DoMessage(Text: string);
80 procedure DoMessageSync;
81 procedure DoOnCall(Address: Word);
82 procedure DoOnReturn;
83 procedure DoOnStep;
84 function ReadByte: Byte;
85 function ReadWord: Word;
86 procedure PushWord(Data: Word);
87 function PopWord: Word;
88 procedure Call(Address: Word);
89 procedure CallCond(Address: Word; Condition: Boolean);
90 procedure CpByte(Data: Byte);
91 procedure Jr(Condition: Boolean);
92 procedure Jp(Condition: Boolean);
93 procedure RetCond(Condition: Boolean);
94 procedure NotImplemented;
95 procedure AddByte(var Target: Byte; Second: Byte);
96 procedure AddWord(var Target: Word; Second: Word);
97 procedure AdcByte(var Target: Byte; Second: Byte);
98 procedure AdcWord(var Target: Word; Second: Word);
99 procedure SubByte(var Target: Byte; Second: Byte);
100 procedure SbcByte(var Target: Byte; Second: Byte);
101 procedure SbcWord(var Target: Word; Second: Word);
102 procedure XorByte(var Target: Byte; Second: Byte);
103 procedure OrByte(var Target: Byte; Second: Byte);
104 procedure AndByte(var Target: Byte; Second: Byte);
105 procedure IncByte(var Reg: Byte);
106 procedure IncWord(var Reg: Word);
107 procedure DecByte(var Reg: Byte);
108 procedure DecWord(var Reg: Word);
109 procedure RlcByte(var Data: Byte);
110 procedure RrcByte(var Data: Byte);
111
112 // Instruction methods
113 procedure NOP;
114 procedure LD_BC_NN;
115 procedure LD_BC_Indirect_A;
116 procedure INC_BC;
117 procedure INC_B;
118 procedure DEC_B;
119 procedure LD_B_N;
120 procedure RLCA;
121 procedure EX_AF_AF_Pair;
122 procedure ADD_HL_BC;
123 procedure LD_A_BC_Indirect;
124 procedure DEC_BC;
125 procedure INC_C;
126 procedure DEC_C;
127 procedure LD_C_N;
128 procedure RRCA;
129 procedure DJNZ_D;
130 procedure LD_DE_NN;
131 procedure LD_DE_Indirect_A;
132 procedure INC_DE;
133 procedure INC_D;
134 procedure DEC_D;
135 procedure LD_D_N;
136 procedure RLA;
137 procedure JR_D;
138 procedure ADD_HL_DE;
139 procedure LD_A_DE_Indirect;
140 procedure DEC_DE;
141 procedure INC_E;
142 procedure DEC_E;
143 procedure LD_E_N;
144 procedure RRA;
145 procedure JR_NZ_D;
146 procedure LD_HL_NN;
147 procedure LD_NN_Indirect_HL;
148 procedure INC_HL;
149 procedure INC_H;
150 procedure DEC_H;
151 procedure LD_H_N;
152 procedure DAA;
153 procedure JR_Z_D;
154 procedure ADD_HL_HL;
155 procedure LD_HL_NN_Indirect;
156 procedure DEC_HL;
157 procedure INC_L;
158 procedure DEC_L;
159 procedure LD_L_N;
160 procedure CPL;
161 procedure JR_NC_D;
162 procedure LD_SP_NN;
163 procedure LD_NN_Indirect_A;
164 procedure INC_SP;
165 procedure INC_HL_Indirect;
166 procedure DEC_HL_Indirect;
167 procedure LD_HL_Indirect_N;
168 procedure SCF;
169 procedure JR_C_D;
170 procedure ADD_HL_SP;
171 procedure LD_A_NN_Indirect;
172 procedure DEC_SP;
173 procedure INC_A;
174 procedure DEC_A;
175 procedure LD_A_N;
176 procedure CCF;
177 procedure LD_B_B;
178 procedure LD_B_C;
179 procedure LD_B_D;
180 procedure LD_B_E;
181 procedure LD_B_H;
182 procedure LD_B_L;
183 procedure LD_B_HL_Indirect;
184 procedure LD_B_A;
185 procedure LD_C_B;
186 procedure LD_C_C;
187 procedure LD_C_D;
188 procedure LD_C_E;
189 procedure LD_C_H;
190 procedure LD_C_L;
191 procedure LD_C_HL_Indirect;
192 procedure LD_C_A;
193 procedure LD_D_B;
194 procedure LD_D_C;
195 procedure LD_D_D;
196 procedure LD_D_E;
197 procedure LD_D_H;
198 procedure LD_D_L;
199 procedure LD_D_HL_Indirect;
200 procedure LD_D_A;
201 procedure LD_E_B;
202 procedure LD_E_C;
203 procedure LD_E_D;
204 procedure LD_E_E;
205 procedure LD_E_H;
206 procedure LD_E_L;
207 procedure LD_E_HL_Indirect;
208 procedure LD_E_A;
209 procedure LD_H_B;
210 procedure LD_H_C;
211 procedure LD_H_D;
212 procedure LD_H_E;
213 procedure LD_H_H;
214 procedure LD_H_L;
215 procedure LD_H_HL_Indirect;
216 procedure LD_H_A;
217 procedure LD_L_B;
218 procedure LD_L_C;
219 procedure LD_L_D;
220 procedure LD_L_E;
221 procedure LD_L_H;
222 procedure LD_L_L;
223 procedure LD_L_HL_Indirect;
224 procedure LD_L_A;
225 procedure LD_HL_Indirect_B;
226 procedure LD_HL_Indirect_C;
227 procedure LD_HL_Indirect_D;
228 procedure LD_HL_Indirect_E;
229 procedure LD_HL_Indirect_H;
230 procedure LD_HL_Indirect_L;
231 procedure HALT;
232 procedure LD_HL_Indirect_A;
233 procedure LD_A_B;
234 procedure LD_A_C;
235 procedure LD_A_D;
236 procedure LD_A_E;
237 procedure LD_A_H;
238 procedure LD_A_L;
239 procedure LD_A_HL_Indirect;
240 procedure LD_A_A;
241 procedure ADD_A_B;
242 procedure ADD_A_C;
243 procedure ADD_A_D;
244 procedure ADD_A_E;
245 procedure ADD_A_H;
246 procedure ADD_A_L;
247 procedure ADD_A_HL_Indirect;
248 procedure ADD_A_A;
249 procedure ADC_A_B;
250 procedure ADC_A_C;
251 procedure ADC_A_D;
252 procedure ADC_A_E;
253 procedure ADC_A_H;
254 procedure ADC_A_L;
255 procedure ADC_A_HL_Indirect;
256 procedure ADC_A_A;
257 procedure SUB_B;
258 procedure SUB_C;
259 procedure SUB_D;
260 procedure SUB_E;
261 procedure SUB_H;
262 procedure SUB_L;
263 procedure SUB_HL_Indirect;
264 procedure SUB_A;
265 procedure SBC_A_B;
266 procedure SBC_A_C;
267 procedure SBC_A_D;
268 procedure SBC_A_E;
269 procedure SBC_A_H;
270 procedure SBC_A_L;
271 procedure SBC_A_HL_Indirect;
272 procedure SBC_A_A;
273 procedure AND_B;
274 procedure AND_C;
275 procedure AND_D;
276 procedure AND_E;
277 procedure AND_H;
278 procedure AND_L;
279 procedure AND_HL_Indirect;
280 procedure AND_A;
281 procedure XOR_B;
282 procedure XOR_C;
283 procedure XOR_D;
284 procedure XOR_E;
285 procedure XOR_H;
286 procedure XOR_L;
287 procedure XOR_HL_Indirect;
288 procedure XOR_A;
289 procedure OR_B;
290 procedure OR_C;
291 procedure OR_D;
292 procedure OR_E;
293 procedure OR_H;
294 procedure OR_L;
295 procedure OR_HL_Indirect;
296 procedure OR_A;
297 procedure CP_B;
298 procedure CP_C;
299 procedure CP_D;
300 procedure CP_E;
301 procedure CP_H;
302 procedure CP_L;
303 procedure CP_HL_Indirect;
304 procedure CP_A;
305 procedure RET_NZ;
306 procedure POP_BC;
307 procedure JP_NZ_NN;
308 procedure JP_NN;
309 procedure CALL_NZ_NN;
310 procedure PUSH_BC;
311 procedure ADD_A_N;
312 procedure RST_00H;
313 procedure RET_Z;
314 procedure RET;
315 procedure JP_Z_NN;
316 procedure CALL_Z_NN;
317 procedure CALL_NN;
318 procedure ADC_A_N;
319 procedure RST_08H;
320 procedure RET_NC;
321 procedure POP_DE;
322 procedure JP_NC_NN;
323 procedure OUT_N_Indirect_A;
324 procedure CALL_NC_NN;
325 procedure PUSH_DE;
326 procedure SUB_N;
327 procedure RST_10H;
328 procedure RET_C;
329 procedure EXX;
330 procedure JP_C_NN;
331 procedure IN_A_N_Indirect;
332 procedure CALL_C_NN;
333 procedure SBC_A_N;
334 procedure RST_18H;
335 procedure RET_PO;
336 procedure POP_HL;
337 procedure JP_PO_NN;
338 procedure EX_SP_Indirect_HL;
339 procedure CALL_PO_NN;
340 procedure PUSH_HL;
341 procedure AND_N;
342 procedure RST_20H;
343 procedure RET_PE;
344 procedure JP_HL_Indirect;
345 procedure JP_PE_NN;
346 procedure EX_DE_HL;
347 procedure CALL_PE_NN;
348 procedure XOR_N;
349 procedure RST_28H;
350 procedure RET_P;
351 procedure POP_AF;
352 procedure JP_P_NN;
353 procedure DI;
354 procedure CALL_P_NN;
355 procedure PUSH_AF;
356 procedure OR_N;
357 procedure RST_30H;
358 procedure RET_M;
359 procedure LD_SP_HL;
360 procedure JP_M_NN;
361 procedure EI;
362 procedure CALL_M_NN;
363 procedure CP_N;
364 procedure RST_38H;
365 procedure IN_B_C_Indirect;
366 procedure OUT_C_Indirect_B;
367 procedure SBC_HL_BC;
368 procedure LD_NN_Indirect_BC;
369 procedure NEG;
370 procedure RETN;
371 procedure IM_0;
372 procedure LD_I_A;
373 procedure IN_C_C_Indirect;
374 procedure OUT_C_Indirect_C;
375 procedure ADC_HL_BC;
376 procedure LD_BC_NN_Indirect;
377 procedure RETI;
378 procedure LD_R_A;
379 procedure IN_D_C_Indirect;
380 procedure OUT_C_Indirect_D;
381 procedure SBC_HL_DE;
382 procedure LD_NN_Indirect_DE;
383 procedure IM_1;
384 procedure LD_A_I;
385 procedure IN_E_C_Indirect;
386 procedure OUT_C_Indirect_E;
387 procedure ADC_HL_DE;
388 procedure LD_DE_NN_Indirect;
389 procedure IM_2;
390 procedure LD_A_R;
391 procedure IN_H_C_Indirect;
392 procedure OUT_C_Indirect_H;
393 procedure SBC_HL_HL;
394 procedure RRD;
395 procedure IN_L_C_Indirect;
396 procedure OUT_C_Indirect_L;
397 procedure ADC_HL_HL;
398 procedure RLD;
399 procedure SBC_HL_SP;
400 procedure LD_NN_Indirect_SP;
401 procedure IN_A_C_Indirect;
402 procedure OUT_C_Indirect_A;
403 procedure ADC_HL_SP;
404 procedure LD_SP_NN_Indirect;
405 procedure LDI;
406 procedure CPI;
407 procedure INI;
408 procedure OUTI;
409 procedure LDD;
410 procedure CPD;
411 procedure IND;
412 procedure OUTD;
413 procedure LDIR;
414 procedure CPIR;
415 procedure INIR;
416 procedure OTIR;
417 procedure LDDR;
418 procedure CPDR;
419 procedure INDR;
420 procedure OTDR;
421 procedure RLC_B;
422 procedure RLC_C;
423 procedure RLC_D;
424 procedure RLC_E;
425 procedure RLC_H;
426 procedure RLC_L;
427 procedure RLC_HL_Indirect;
428 procedure RLC_A;
429 procedure RRC_B;
430 procedure RRC_C;
431 procedure RRC_D;
432 procedure RRC_E;
433 procedure RRC_H;
434 procedure RRC_L;
435 procedure RRC_HL_Indirect;
436 procedure RRC_A;
437 procedure RL_B;
438 procedure RL_C;
439 procedure RL_D;
440 procedure RL_E;
441 procedure RL_H;
442 procedure RL_L;
443 procedure RL_HL_Indirect;
444 procedure RL_A;
445 procedure RR_B;
446 procedure RR_C;
447 procedure RR_D;
448 procedure RR_E;
449 procedure RR_H;
450 procedure RR_L;
451 procedure RR_HL_Indirect;
452 procedure RR_A;
453 procedure SLA_B;
454 procedure SLA_C;
455 procedure SLA_D;
456 procedure SLA_E;
457 procedure SLA_H;
458 procedure SLA_L;
459 procedure SLA_HL_Indirect;
460 procedure SLA_A;
461 procedure SRA_B;
462 procedure SRA_C;
463 procedure SRA_D;
464 procedure SRA_E;
465 procedure SRA_H;
466 procedure SRA_L;
467 procedure SRA_HL_Indirect;
468 procedure SRA_A;
469 procedure SRL_B;
470 procedure SRL_C;
471 procedure SRL_D;
472 procedure SRL_E;
473 procedure SRL_H;
474 procedure SRL_L;
475 procedure SRL_HL_Indirect;
476 procedure SRL_A;
477 procedure BIT_0_B;
478 procedure BIT_0_C;
479 procedure BIT_0_D;
480 procedure BIT_0_E;
481 procedure BIT_0_H;
482 procedure BIT_0_L;
483 procedure BIT_0_HL_Indirect;
484 procedure BIT_0_A;
485 procedure BIT_1_B;
486 procedure BIT_1_C;
487 procedure BIT_1_D;
488 procedure BIT_1_E;
489 procedure BIT_1_H;
490 procedure BIT_1_L;
491 procedure BIT_1_HL_Indirect;
492 procedure BIT_1_A;
493 procedure BIT_2_B;
494 procedure BIT_2_C;
495 procedure BIT_2_D;
496 procedure BIT_2_E;
497 procedure BIT_2_H;
498 procedure BIT_2_L;
499 procedure BIT_2_HL_Indirect;
500 procedure BIT_2_A;
501 procedure BIT_3_B;
502 procedure BIT_3_C;
503 procedure BIT_3_D;
504 procedure BIT_3_E;
505 procedure BIT_3_H;
506 procedure BIT_3_L;
507 procedure BIT_3_HL_Indirect;
508 procedure BIT_3_A;
509 procedure BIT_4_B;
510 procedure BIT_4_C;
511 procedure BIT_4_D;
512 procedure BIT_4_E;
513 procedure BIT_4_H;
514 procedure BIT_4_L;
515 procedure BIT_4_HL_Indirect;
516 procedure BIT_4_A;
517 procedure BIT_5_B;
518 procedure BIT_5_C;
519 procedure BIT_5_D;
520 procedure BIT_5_E;
521 procedure BIT_5_H;
522 procedure BIT_5_L;
523 procedure BIT_5_HL_Indirect;
524 procedure BIT_5_A;
525 procedure BIT_6_B;
526 procedure BIT_6_C;
527 procedure BIT_6_D;
528 procedure BIT_6_E;
529 procedure BIT_6_H;
530 procedure BIT_6_L;
531 procedure BIT_6_HL_Indirect;
532 procedure BIT_6_A;
533 procedure BIT_7_B;
534 procedure BIT_7_C;
535 procedure BIT_7_D;
536 procedure BIT_7_E;
537 procedure BIT_7_H;
538 procedure BIT_7_L;
539 procedure BIT_7_HL_Indirect;
540 procedure BIT_7_A;
541 procedure RES_0_B;
542 procedure RES_0_C;
543 procedure RES_0_D;
544 procedure RES_0_E;
545 procedure RES_0_H;
546 procedure RES_0_L;
547 procedure RES_0_HL_Indirect;
548 procedure RES_0_A;
549 procedure RES_1_B;
550 procedure RES_1_C;
551 procedure RES_1_D;
552 procedure RES_1_E;
553 procedure RES_1_H;
554 procedure RES_1_L;
555 procedure RES_1_HL_Indirect;
556 procedure RES_1_A;
557 procedure RES_2_B;
558 procedure RES_2_C;
559 procedure RES_2_D;
560 procedure RES_2_E;
561 procedure RES_2_H;
562 procedure RES_2_L;
563 procedure RES_2_HL_Indirect;
564 procedure RES_2_A;
565 procedure RES_3_B;
566 procedure RES_3_C;
567 procedure RES_3_D;
568 procedure RES_3_E;
569 procedure RES_3_H;
570 procedure RES_3_L;
571 procedure RES_3_HL_Indirect;
572 procedure RES_3_A;
573 procedure RES_4_B;
574 procedure RES_4_C;
575 procedure RES_4_D;
576 procedure RES_4_E;
577 procedure RES_4_H;
578 procedure RES_4_L;
579 procedure RES_4_HL_Indirect;
580 procedure RES_4_A;
581 procedure RES_5_B;
582 procedure RES_5_C;
583 procedure RES_5_D;
584 procedure RES_5_E;
585 procedure RES_5_H;
586 procedure RES_5_L;
587 procedure RES_5_HL_Indirect;
588 procedure RES_5_A;
589 procedure RES_6_B;
590 procedure RES_6_C;
591 procedure RES_6_D;
592 procedure RES_6_E;
593 procedure RES_6_H;
594 procedure RES_6_L;
595 procedure RES_6_HL_Indirect;
596 procedure RES_6_A;
597 procedure RES_7_B;
598 procedure RES_7_C;
599 procedure RES_7_D;
600 procedure RES_7_E;
601 procedure RES_7_H;
602 procedure RES_7_L;
603 procedure RES_7_HL_Indirect;
604 procedure RES_7_A;
605 procedure SET_0_B;
606 procedure SET_0_C;
607 procedure SET_0_D;
608 procedure SET_0_E;
609 procedure SET_0_H;
610 procedure SET_0_L;
611 procedure SET_0_HL_Indirect;
612 procedure SET_0_A;
613 procedure SET_1_B;
614 procedure SET_1_C;
615 procedure SET_1_D;
616 procedure SET_1_E;
617 procedure SET_1_H;
618 procedure SET_1_L;
619 procedure SET_1_HL_Indirect;
620 procedure SET_1_A;
621 procedure SET_2_B;
622 procedure SET_2_C;
623 procedure SET_2_D;
624 procedure SET_2_E;
625 procedure SET_2_H;
626 procedure SET_2_L;
627 procedure SET_2_HL_Indirect;
628 procedure SET_2_A;
629 procedure SET_3_B;
630 procedure SET_3_C;
631 procedure SET_3_D;
632 procedure SET_3_E;
633 procedure SET_3_H;
634 procedure SET_3_L;
635 procedure SET_3_HL_Indirect;
636 procedure SET_3_A;
637 procedure SET_4_B;
638 procedure SET_4_C;
639 procedure SET_4_D;
640 procedure SET_4_E;
641 procedure SET_4_H;
642 procedure SET_4_L;
643 procedure SET_4_HL_Indirect;
644 procedure SET_4_A;
645 procedure SET_5_B;
646 procedure SET_5_C;
647 procedure SET_5_D;
648 procedure SET_5_E;
649 procedure SET_5_H;
650 procedure SET_5_L;
651 procedure SET_5_HL_Indirect;
652 procedure SET_5_A;
653 procedure SET_6_B;
654 procedure SET_6_C;
655 procedure SET_6_D;
656 procedure SET_6_E;
657 procedure SET_6_H;
658 procedure SET_6_L;
659 procedure SET_6_HL_Indirect;
660 procedure SET_6_A;
661 procedure SET_7_B;
662 procedure SET_7_C;
663 procedure SET_7_D;
664 procedure SET_7_E;
665 procedure SET_7_H;
666 procedure SET_7_L;
667 procedure SET_7_HL_Indirect;
668 procedure SET_7_A;
669 procedure ADD_IX_BC;
670 procedure ADD_IX_DE;
671 procedure LD_IX_NN;
672 procedure LD_NN_Indirect_IX;
673 procedure INC_IX;
674 procedure ADD_IX_IX;
675 procedure LD_IX_NN_Indirect;
676 procedure DEC_IX;
677 procedure INC_IX_Plus_D_Indirect;
678 procedure DEC_IX_Plus_D_Indirect;
679 procedure LD_IX_Plus_D_Indirect_N;
680 procedure ADD_IX_SP;
681 procedure LD_B_IX_Plus_D_Indirect;
682 procedure LD_C_IX_Plus_D_Indirect;
683 procedure LD_D_IX_Plus_D_Indirect;
684 procedure LD_E_IX_Plus_D_Indirect;
685 procedure LD_H_IX_Plus_D_Indirect;
686 procedure LD_L_IX_Plus_D_Indirect;
687 procedure LD_IX_Plus_D_Indirect_B;
688 procedure LD_IX_Plus_D_Indirect_C;
689 procedure LD_IX_Plus_D_Indirect_D;
690 procedure LD_IX_Plus_D_Indirect_E;
691 procedure LD_IX_Plus_D_Indirect_H;
692 procedure LD_IX_Plus_D_Indirect_L;
693 procedure LD_IX_Plus_D_Indirect_A;
694 procedure LD_A_IX_Plus_D_Indirect;
695 procedure ADD_A_IX_Plus_D_Indirect;
696 procedure ADC_A_IX_Plus_D_Indirect;
697 procedure SUB_IX_Plus_D_Indirect;
698 procedure SBC_A_IX_Plus_D_Indirect;
699 procedure AND_IX_Plus_D_Indirect;
700 procedure XOR_IX_Plus_D_Indirect;
701 procedure OR_IX_Plus_D_Indirect;
702 procedure CP_IX_Plus_D_Indirect;
703 procedure POP_IX;
704 procedure EX_SP_Indirect_IX;
705 procedure PUSH_IX;
706 procedure JP_IX_Indirect;
707 procedure LD_SP_IX;
708 procedure RLC_IX_Plus_D_Indirect;
709 procedure RRC_IX_Plus_D_Indirect;
710 procedure RL_IX_Plus_D_Indirect;
711 procedure RR_IX_Plus_D_Indirect;
712 procedure SLA_IX_Plus_D_Indirect;
713 procedure SRA_IX_Plus_D_Indirect;
714 procedure SRL_IX_Plus_D_Indirect;
715 procedure BIT_0_IX_Plus_D_Indirect;
716 procedure BIT_1_IX_Plus_D_Indirect;
717 procedure BIT_2_IX_Plus_D_Indirect;
718 procedure BIT_3_IX_Plus_D_Indirect;
719 procedure BIT_4_IX_Plus_D_Indirect;
720 procedure BIT_5_IX_Plus_D_Indirect;
721 procedure BIT_6_IX_Plus_D_Indirect;
722 procedure BIT_7_IX_Plus_D_Indirect;
723 procedure RES_0_IX_Plus_D_Indirect;
724 procedure RES_1_IX_Plus_D_Indirect;
725 procedure RES_2_IX_Plus_D_Indirect;
726 procedure RES_3_IX_Plus_D_Indirect;
727 procedure RES_4_IX_Plus_D_Indirect;
728 procedure RES_5_IX_Plus_D_Indirect;
729 procedure RES_6_IX_Plus_D_Indirect;
730 procedure RES_7_IX_Plus_D_Indirect;
731 procedure SET_0_IX_Plus_D_Indirect;
732 procedure SET_1_IX_Plus_D_Indirect;
733 procedure SET_2_IX_Plus_D_Indirect;
734 procedure SET_3_IX_Plus_D_Indirect;
735 procedure SET_4_IX_Plus_D_Indirect;
736 procedure SET_5_IX_Plus_D_Indirect;
737 procedure SET_6_IX_Plus_D_Indirect;
738 procedure SET_7_IX_Plus_D_Indirect;
739 procedure ADD_IY_BC;
740 procedure ADD_IY_DE;
741 procedure LD_IY_NN;
742 procedure LD_NN_Indirect_IY;
743 procedure INC_IY;
744 procedure ADD_IY_IY;
745 procedure LD_IY_NN_Indirect;
746 procedure DEC_IY;
747 procedure INC_IY_Plus_D_Indirect;
748 procedure DEC_IY_Plus_D_Indirect;
749 procedure LD_IY_Plus_D_Indirect_N;
750 procedure ADD_IY_SP;
751 procedure LD_B_IY_Plus_D_Indirect;
752 procedure LD_C_IY_Plus_D_Indirect;
753 procedure LD_D_IY_Plus_D_Indirect;
754 procedure LD_E_IY_Plus_D_Indirect;
755 procedure LD_H_IY_Plus_D_Indirect;
756 procedure LD_L_IY_Plus_D_Indirect;
757 procedure LD_IY_Plus_D_Indirect_B;
758 procedure LD_IY_Plus_D_Indirect_C;
759 procedure LD_IY_Plus_D_Indirect_D;
760 procedure LD_IY_Plus_D_Indirect_E;
761 procedure LD_IY_Plus_D_Indirect_H;
762 procedure LD_IY_Plus_D_Indirect_L;
763 procedure LD_IY_Plus_D_Indirect_A;
764 procedure LD_A_IY_Plus_D_Indirect;
765 procedure ADD_A_IY_Plus_D_Indirect;
766 procedure ADC_A_IY_Plus_D_Indirect;
767 procedure SUB_IY_Plus_D_Indirect;
768 procedure SBC_A_IY_Plus_D_Indirect;
769 procedure AND_IY_Plus_D_Indirect;
770 procedure XOR_IY_Plus_D_Indirect;
771 procedure OR_IY_Plus_D_Indirect;
772 procedure CP_IY_Plus_D_Indirect;
773 procedure POP_IY;
774 procedure EX_SP_Indirect_IY;
775 procedure PUSH_IY;
776 procedure JP_IY_Indirect;
777 procedure LD_SP_IY;
778 procedure RLC_IY_Plus_D_Indirect;
779 procedure RRC_IY_Plus_D_Indirect;
780 procedure RL_IY_Plus_D_Indirect;
781 procedure RR_IY_Plus_D_Indirect;
782 procedure SLA_IY_Plus_D_Indirect;
783 procedure SRA_IY_Plus_D_Indirect;
784 procedure SRL_IY_Plus_D_Indirect;
785 procedure BIT_0_IY_Plus_D_Indirect;
786 procedure BIT_1_IY_Plus_D_Indirect;
787 procedure BIT_2_IY_Plus_D_Indirect;
788 procedure BIT_3_IY_Plus_D_Indirect;
789 procedure BIT_4_IY_Plus_D_Indirect;
790 procedure BIT_5_IY_Plus_D_Indirect;
791 procedure BIT_6_IY_Plus_D_Indirect;
792 procedure BIT_7_IY_Plus_D_Indirect;
793 procedure RES_0_IY_Plus_D_Indirect;
794 procedure RES_1_IY_Plus_D_Indirect;
795 procedure RES_2_IY_Plus_D_Indirect;
796 procedure RES_3_IY_Plus_D_Indirect;
797 procedure RES_4_IY_Plus_D_Indirect;
798 procedure RES_5_IY_Plus_D_Indirect;
799 procedure RES_6_IY_Plus_D_Indirect;
800 procedure RES_7_IY_Plus_D_Indirect;
801 procedure SET_0_IY_Plus_D_Indirect;
802 procedure SET_1_IY_Plus_D_Indirect;
803 procedure SET_2_IY_Plus_D_Indirect;
804 procedure SET_3_IY_Plus_D_Indirect;
805 procedure SET_4_IY_Plus_D_Indirect;
806 procedure SET_5_IY_Plus_D_Indirect;
807 procedure SET_6_IY_Plus_D_Indirect;
808 procedure SET_7_IY_Plus_D_Indirect;
809
810 procedure InitInstructions;
811 public
812 PC: Word;
813 SP: Word;
814 AF: TRegAF;
815 BC: TRegBC;
816 DE: TRegDE;
817 HL: TRegHL;
818 AF2: TRegAF;
819 BC2: TRegBC;
820 DE2: TRegDE;
821 HL2: TRegHL;
822 IX: Word;
823 IY: Word;
824 RegI: Byte;
825 RegR: Byte;
826 Memory: TMemory;
827 Ticks: Cardinal;
828 Cycles: Cardinal;
829 InterruptEnabled: Boolean;
830 InterruptMode: Byte;
831 Instructions: TInstructionMethods;
832 procedure Step;
833 procedure Reset;
834 constructor Create;
835 destructor Destroy; override;
836 property Carry: Boolean read GetCarry write SetCarry;
837 property Zero: Boolean read GetZero write SetZero;
838 property ParityOverflow: Boolean read GetParityOverflow
839 write SetParityOverflow;
840 property SignNegative: Boolean read GetSignNegative write SetSignNegative;
841 property Thread: TCpuThread read FThread;
842 property Paused: Boolean read FPaused write SetPaused;
843 property Running: Boolean read FRunning write SetRunning;
844 property OnRead: TReadEvent read FOnRead write FOnRead;
845 property OnWrite: TWriteEvent read FOnWrite write FOnWrite;
846 property OnInput: TReadEvent read FOnInput write FOnInput;
847 property OnOutput: TWriteEvent read FOnOutput write FOnOutput;
848 property OnMessage: TMessageEvent read FOnMessage write FOnMessage;
849 property OnCall: TAddressEvent read FOnCall write FOnCall;
850 property OnReturn: TBaseEvent read FOnReturn write FOnReturn;
851 property OnStep: TBaseEvent read FOnStep write FOnStep;
852 end;
853
854
855implementation
856
857{ TCpuThread }
858
859procedure TCpuThread.Execute;
860begin
861 while not Terminated do begin
862 Cpu.FEvent.WaitFor(INFINITE);
863 Cpu.Step;
864 end;
865 Cpu.FRunning := False;
866end;
867
868{ TCpuZ80 }
869
870procedure TCpuZ80.Error(Message: string);
871begin
872 PC := InstructionAddress;
873 DoMessage(Message + ' on address ' + IntToHex(Word(PC), 4));
874 Halt;
875end;
876
877function TCpuZ80.GetCarry: Boolean;
878begin
879 Result := (AF.F and $1) <> 0;
880end;
881
882function TCpuZ80.GetParityOverflow: Boolean;
883begin
884 Result := (AF.F and $4) <> 0;
885end;
886
887function TCpuZ80.GetSignNegative: Boolean;
888begin
889 Result := (AF.F and $80) <> 0;
890end;
891
892function TCpuZ80.GetZero: Boolean;
893begin
894 Result := (AF.F and $40) <> 0;
895end;
896
897procedure TCpuZ80.SetCarry(AValue: Boolean);
898begin
899 AF.F := (AF.F and $fe) or Byte(AValue);
900end;
901
902procedure TCpuZ80.SetParityOverflow(AValue: Boolean);
903begin
904 AF.F := (AF.F and $fb) or (Byte(AValue) shl 2);
905end;
906
907procedure TCpuZ80.SetPaused(AValue: Boolean);
908begin
909 if not Running then Exit;
910
911 if FPaused = AValue then Exit;
912 if FPaused then begin
913 FPaused := False;
914 FEvent.SetEvent;
915 end;
916 FPaused := AValue;
917 if FPaused then begin
918 FPaused := True;
919 FEvent.ResetEvent;
920 end;
921end;
922
923procedure TCpuZ80.SetSignNegative(AValue: Boolean);
924begin
925 AF.F := (AF.F and $7f) or (Byte(AValue) shl 7);
926end;
927
928procedure TCpuZ80.SetZero(AValue: Boolean);
929begin
930 AF.F := (AF.F and $bf) or (Byte(AValue) shl 6);
931end;
932
933procedure TCpuZ80.SetRunning(AValue: Boolean);
934begin
935 if FRunning and FPaused then Paused := False;
936
937 if FRunning = AValue then Exit;
938 if FRunning then begin
939 FThread.Terminate;
940 if FPaused then Paused := False;
941 FThread.WaitFor;
942 FreeAndNil(FThread);
943 end;
944 FRunning := AValue;
945 if FRunning then begin
946 if Assigned(FThread) then FThread.Free;
947 FThread := TCpuThread.Create(True);
948 FThread.FreeOnTerminate := False;
949 FThread.Cpu := Self;
950 FThread.Start;
951 end;
952end;
953
954function TCpuZ80.DoRead(Address: Word): Byte;
955begin
956 if Assigned(FOnRead) then Result := FOnRead(Address);
957end;
958
959function TCpuZ80.DoReadWord(Address: Word): Word;
960begin
961 Result := DoRead(Address) or (DoRead(Address + 1) shl 8);
962end;
963
964procedure TCpuZ80.DoWrite(Address: Word; Data: Byte);
965begin
966 if Assigned(FOnRead) then FOnWrite(Address, Data);
967end;
968
969procedure TCpuZ80.DoWriteWord(Address: Word; Data: Word);
970begin
971 DoWrite(Address, Data and $ff);
972 DoWrite(Address + 1, Data shr 8);
973end;
974
975function TCpuZ80.DoInput(Address: Word): Byte;
976begin
977 if Assigned(FOnInput) then Result := FOnInput(Address);
978end;
979
980procedure TCpuZ80.DoOutput(Address: Word; Data: Byte);
981begin
982 if Assigned(FOnOutput) then FOnOutput(Address, Data);
983end;
984
985procedure TCpuZ80.DoMessage(Text: string);
986begin
987 MessageText := Text;
988 DoMessageSync;
989 MessageText := '';
990end;
991
992procedure TCpuZ80.DoMessageSync;
993begin
994 if Assigned(FOnMessage) then FOnMessage(MessageText);
995end;
996
997procedure TCpuZ80.DoOnCall(Address: Word);
998begin
999 if Assigned(FOnCall) then FOnCall(Address);
1000end;
1001
1002procedure TCpuZ80.DoOnReturn;
1003begin
1004 if Assigned(FOnReturn) then FOnReturn;
1005end;
1006
1007procedure TCpuZ80.DoOnStep;
1008begin
1009 if Assigned(FOnStep) then FOnStep;
1010end;
1011
1012function TCpuZ80.ReadByte: Byte;
1013begin
1014 Result := DoRead(PC);
1015 PC := (PC + SizeOf(Byte)) mod $10000;
1016end;
1017
1018function TCpuZ80.ReadWord: Word;
1019begin
1020 Result := DoRead(PC) or (DoRead(PC + 1) shl 8);
1021 PC := (PC + SizeOf(Word)) mod $10000;
1022end;
1023
1024procedure TCpuZ80.PushWord(Data: Word);
1025begin
1026 SP := (SP + $10000 - SizeOf(Word)) mod $10000;
1027 DoWrite(SP, Data and $ff);
1028 DoWrite(SP + 1, Data shr 8);
1029end;
1030
1031function TCpuZ80.PopWord: Word;
1032begin
1033 Result := DoRead(SP) or (DoRead(SP + 1) shl 8);
1034 SP := (SP + SizeOf(Word)) mod $10000;
1035end;
1036
1037procedure TCpuZ80.Call(Address: Word);
1038begin
1039 DoOnCall(Address);
1040 PushWord(PC);
1041 PC := Address;
1042end;
1043
1044procedure TCpuZ80.CallCond(Address: Word; Condition: Boolean);
1045begin
1046 DoOnCall(Address);
1047 if Condition then begin
1048 PushWord(PC);
1049 PC := Address;
1050 end;
1051end;
1052
1053procedure TCpuZ80.CpByte(Data: Byte);
1054var
1055 Temp: Byte;
1056begin
1057 Temp := AF.A;
1058 SubByte(Temp, Data);
1059end;
1060
1061procedure TCpuZ80.Jr(Condition: Boolean);
1062var
1063 Temp: ShortInt;
1064begin
1065 Temp := ShortInt(ReadByte);
1066 if Condition then
1067 PC := PC + Temp;
1068end;
1069
1070procedure TCpuZ80.Jp(Condition: Boolean);
1071var
1072 Temp: Word;
1073begin
1074 Temp := ReadWord;
1075 if Condition then PC := Temp;
1076end;
1077
1078procedure TCpuZ80.RetCond(Condition: Boolean);
1079begin
1080 if Condition then begin
1081 PC := PopWord;
1082 DoOnReturn;
1083 end;
1084end;
1085
1086procedure TCpuZ80.NotImplemented;
1087begin
1088 Error('Not implemented instruction ' + IntToHex(Word(Instruction), 4));
1089end;
1090
1091procedure TCpuZ80.AddByte(var Target: Byte; Second: Byte);
1092var
1093 Temp: Word;
1094begin
1095 Temp := Target + Second;
1096 ParityOverflow := ((Target and $80) = (Second and $80)) and
1097 ((Target and $80) <> (Temp and $80));
1098 Carry := (Temp and $100) <> 0;
1099 Zero := Byte(Temp) = 0;
1100 SignNegative := (Temp and $80) <> 0;
1101 Target := Byte(Temp);
1102end;
1103
1104procedure TCpuZ80.AddWord(var Target: Word; Second: Word);
1105var
1106 Temp: Cardinal;
1107begin
1108 Temp := Target + Second;
1109 Carry := Temp > $ffff;
1110 Target := Word(Temp + Second);
1111end;
1112
1113procedure TCpuZ80.AdcByte(var Target: Byte; Second: Byte);
1114var
1115 Temp: Word;
1116begin
1117 Temp := Target + Second + Byte(Carry);
1118 ParityOverflow := ((Target and $80) = (Second and $80)) and
1119 ((Target and $80) <> (Temp and $80));
1120 Carry := (Temp and $100) <> 0;
1121 Zero := Byte(Temp) = 0;
1122 SignNegative := (Temp and $80) <> 0;
1123 Target := Byte(Temp);
1124end;
1125
1126procedure TCpuZ80.AdcWord(var Target: Word; Second: Word);
1127var
1128 Temp: Cardinal;
1129begin
1130 Temp := Target + Second + Byte(Carry);
1131 Carry := Temp > $ffff;
1132 Target := Word(Temp + Second);
1133end;
1134
1135procedure TCpuZ80.SubByte(var Target: Byte; Second: Byte);
1136var
1137 Temp: SmallInt;
1138begin
1139 Temp := ShortInt(Target) - ShortInt(Second);
1140 ParityOverflow := ((Target and $80) <> (Second and $80)) and
1141 ((Target and $80) <> (Temp and $80));
1142 Carry := (Temp and $100) <> 0;
1143 Zero := Byte(Temp) = 0;
1144 SignNegative := (Temp and $80) <> 0;
1145 Target := Byte(Temp);
1146end;
1147
1148procedure TCpuZ80.SbcByte(var Target: Byte; Second: Byte);
1149var
1150 Temp: SmallInt;
1151begin
1152 Temp := ShortInt(Target) - ShortInt(Second) - Byte(Carry);
1153 ParityOverflow := ((Target and $80) <> (Second and $80)) and
1154 ((Target and $80) <> (Temp and $80));
1155 Carry := (Temp and $100) <> 0;
1156 Zero := Byte(Temp) = 0;
1157 SignNegative := (Temp and $80) <> 0;
1158 Target := Byte(Temp);
1159end;
1160
1161procedure TCpuZ80.SbcWord(var Target: Word; Second: Word);
1162var
1163 Temp: Integer;
1164begin
1165 Temp := SmallInt(Target) - SmallInt(Second);
1166 ParityOverflow := ((Target and $8000) <> (Second and $8000)) and
1167 ((Target and $8000) <> (Temp and $8000));
1168 Carry := (Temp and $10000) <> 0;
1169 Zero := Word(Temp) = 0;
1170 SignNegative := (Temp and $8000) <> 0;
1171 Target := Word(Temp);
1172end;
1173
1174procedure TCpuZ80.XorByte(var Target: Byte; Second: Byte);
1175begin
1176 Target := Target xor Second;
1177 Carry := False;
1178 Zero := Target = 0;
1179 ParityOverflow := not Odd(Target);
1180 SignNegative := (Target and $80) <> 0;
1181end;
1182
1183procedure TCpuZ80.OrByte(var Target: Byte; Second: Byte);
1184begin
1185 Target := Target or Second;
1186 Carry := False;
1187 Zero := Target = 0;
1188 ParityOverflow := not Odd(Target);
1189 SignNegative := (Target and $80) <> 0;
1190end;
1191
1192procedure TCpuZ80.AndByte(var Target: Byte; Second: Byte);
1193begin
1194 Target := Target and Second;
1195 Carry := False;
1196 Zero := Target = 0;
1197 ParityOverflow := not Odd(Target);
1198 SignNegative := (Target and $80) <> 0;
1199end;
1200
1201procedure TCpuZ80.IncByte(var Reg: Byte);
1202begin
1203 ParityOverflow := Reg = $7f;
1204
1205 if Reg = High(Reg) then Reg := 0
1206 else Inc(Reg);
1207
1208 Zero := Reg = 0;
1209 SignNegative := (Reg and $80) <> 0;
1210end;
1211
1212procedure TCpuZ80.IncWord(var Reg: Word);
1213begin
1214 if Reg = High(Reg) then Reg := 0
1215 else Inc(Reg);
1216end;
1217
1218procedure TCpuZ80.DecByte(var Reg: Byte);
1219begin
1220 ParityOverflow := Reg = $80;
1221
1222 if Reg = 0 then Reg := High(Reg)
1223 else Dec(Reg);
1224
1225 Zero := Reg = 0;
1226 SignNegative := (Reg and $80) <> 0;
1227end;
1228
1229procedure TCpuZ80.DecWord(var Reg: Word);
1230begin
1231 if Reg = 0 then Reg := High(Reg)
1232 else Dec(Reg);
1233end;
1234
1235procedure TCpuZ80.RlcByte(var Data: Byte);
1236begin
1237 Carry := (Data and $80) <> 0;
1238 Data := ((Data shl 1) and $ff) or Byte(Carry);
1239end;
1240
1241procedure TCpuZ80.RrcByte(var Data: Byte);
1242begin
1243 Carry := (Data and 1) > 0;
1244 Data := (Data shr 1) or ($80 * Byte(Carry));
1245end;
1246
1247procedure TCpuZ80.InitInstructions;
1248begin
1249 Instructions[in_NOP] := NOP;
1250 Instructions[in_LD_BC_NN] := LD_BC_NN;
1251 Instructions[in_LD_BC_Indirect_A] := LD_BC_Indirect_A;
1252 Instructions[in_INC_BC] := INC_BC;
1253 Instructions[in_INC_B] := INC_B;
1254 Instructions[in_DEC_B] := DEC_B;
1255 Instructions[in_LD_B_N] := LD_B_N;
1256 Instructions[in_RLCA] := RLCA;
1257 Instructions[in_EX_AF_AF_Pair] := EX_AF_AF_Pair;
1258 Instructions[in_ADD_HL_BC] := ADD_HL_BC;
1259 Instructions[in_LD_A_BC_Indirect] := LD_A_BC_Indirect;
1260 Instructions[in_DEC_BC] := DEC_BC;
1261 Instructions[in_INC_C] := INC_C;
1262 Instructions[in_DEC_C] := DEC_C;
1263 Instructions[in_LD_C_N] := LD_C_N;
1264 Instructions[in_RRCA] := RRCA;
1265 Instructions[in_DJNZ_D] := DJNZ_D;
1266 Instructions[in_LD_DE_NN] := LD_DE_NN;
1267 Instructions[in_LD_DE_Indirect_A] := LD_DE_Indirect_A;
1268 Instructions[in_INC_DE] := INC_DE;
1269 Instructions[in_INC_D] := INC_D;
1270 Instructions[in_DEC_D] := DEC_D;
1271 Instructions[in_LD_D_N] := LD_D_N;
1272 Instructions[in_RLA] := RLA;
1273 Instructions[in_JR_D] := JR_D;
1274 Instructions[in_ADD_HL_DE] := ADD_HL_DE;
1275 Instructions[in_LD_A_DE_Indirect] := LD_A_DE_Indirect;
1276 Instructions[in_DEC_DE] := DEC_DE;
1277 Instructions[in_INC_E] := INC_E;
1278 Instructions[in_DEC_E] := DEC_E;
1279 Instructions[in_LD_E_N] := LD_E_N;
1280 Instructions[in_RRA] := RRA;
1281 Instructions[in_JR_NZ_D] := JR_NZ_D;
1282 Instructions[in_LD_HL_NN] := LD_HL_NN;
1283 Instructions[in_LD_NN_Indirect_HL] := LD_NN_Indirect_HL;
1284 Instructions[in_INC_HL] := INC_HL;
1285 Instructions[in_INC_H] := INC_H;
1286 Instructions[in_DEC_H] := DEC_H;
1287 Instructions[in_LD_H_N] := LD_H_N;
1288 Instructions[in_DAA] := DAA;
1289 Instructions[in_JR_Z_D] := JR_Z_D;
1290 Instructions[in_ADD_HL_HL] := ADD_HL_HL;
1291 Instructions[in_LD_HL_NN_Indirect] := LD_HL_NN_Indirect;
1292 Instructions[in_DEC_HL] := DEC_HL;
1293 Instructions[in_INC_L] := INC_L;
1294 Instructions[in_DEC_L] := DEC_L;
1295 Instructions[in_LD_L_N] := LD_L_N;
1296 Instructions[in_CPL] := CPL;
1297 Instructions[in_JR_NC_D] := JR_NC_D;
1298 Instructions[in_LD_SP_NN] := LD_SP_NN;
1299 Instructions[in_LD_NN_Indirect_A] := LD_NN_Indirect_A;
1300 Instructions[in_INC_SP] := INC_SP;
1301 Instructions[in_INC_HL_Indirect] := INC_HL_Indirect;
1302 Instructions[in_DEC_HL_Indirect] := DEC_HL_Indirect;
1303 Instructions[in_LD_HL_Indirect_N] := LD_HL_Indirect_N;
1304 Instructions[in_SCF] := SCF;
1305 Instructions[in_JR_C_D] := JR_C_D;
1306 Instructions[in_ADD_HL_SP] := ADD_HL_SP;
1307 Instructions[in_LD_A_NN_Indirect] := LD_A_NN_Indirect;
1308 Instructions[in_DEC_SP] := DEC_SP;
1309 Instructions[in_INC_A] := INC_A;
1310 Instructions[in_DEC_A] := DEC_A;
1311 Instructions[in_LD_A_N] := LD_A_N;
1312 Instructions[in_CCF] := CCF;
1313 Instructions[in_LD_B_B] := LD_B_B;
1314 Instructions[in_LD_B_C] := LD_B_C;
1315 Instructions[in_LD_B_D] := LD_B_D;
1316 Instructions[in_LD_B_E] := LD_B_E;
1317 Instructions[in_LD_B_H] := LD_B_H;
1318 Instructions[in_LD_B_L] := LD_B_L;
1319 Instructions[in_LD_B_HL_Indirect] := LD_B_HL_Indirect;
1320 Instructions[in_LD_B_A] := LD_B_A;
1321 Instructions[in_LD_C_B] := LD_C_B;
1322 Instructions[in_LD_C_C] := LD_C_C;
1323 Instructions[in_LD_C_D] := LD_C_D;
1324 Instructions[in_LD_C_E] := LD_C_E;
1325 Instructions[in_LD_C_H] := LD_C_H;
1326 Instructions[in_LD_C_L] := LD_C_L;
1327 Instructions[in_LD_C_HL_Indirect] := LD_C_HL_Indirect;
1328 Instructions[in_LD_C_A] := LD_C_A;
1329 Instructions[in_LD_D_B] := LD_D_B;
1330 Instructions[in_LD_D_C] := LD_D_C;
1331 Instructions[in_LD_D_D] := LD_D_D;
1332 Instructions[in_LD_D_E] := LD_D_E;
1333 Instructions[in_LD_D_H] := LD_D_H;
1334 Instructions[in_LD_D_L] := LD_D_L;
1335 Instructions[in_LD_D_HL_Indirect] := LD_D_HL_Indirect;
1336 Instructions[in_LD_D_A] := LD_D_A;
1337 Instructions[in_LD_E_B] := LD_E_B;
1338 Instructions[in_LD_E_C] := LD_E_C;
1339 Instructions[in_LD_E_D] := LD_E_D;
1340 Instructions[in_LD_E_E] := LD_E_E;
1341 Instructions[in_LD_E_H] := LD_E_H;
1342 Instructions[in_LD_E_L] := LD_E_L;
1343 Instructions[in_LD_E_HL_Indirect] := LD_E_HL_Indirect;
1344 Instructions[in_LD_E_A] := LD_E_A;
1345 Instructions[in_LD_H_B] := LD_H_B;
1346 Instructions[in_LD_H_C] := LD_H_C;
1347 Instructions[in_LD_H_D] := LD_H_D;
1348 Instructions[in_LD_H_E] := LD_H_E;
1349 Instructions[in_LD_H_H] := LD_H_H;
1350 Instructions[in_LD_H_L] := LD_H_L;
1351 Instructions[in_LD_H_HL_Indirect] := LD_H_HL_Indirect;
1352 Instructions[in_LD_H_A] := LD_H_A;
1353 Instructions[in_LD_L_B] := LD_L_B;
1354 Instructions[in_LD_L_C] := LD_L_C;
1355 Instructions[in_LD_L_D] := LD_L_D;
1356 Instructions[in_LD_L_E] := LD_L_E;
1357 Instructions[in_LD_L_H] := LD_L_H;
1358 Instructions[in_LD_L_L] := LD_L_L;
1359 Instructions[in_LD_L_HL_Indirect] := LD_L_HL_Indirect;
1360 Instructions[in_LD_L_A] := LD_L_A;
1361 Instructions[in_LD_HL_Indirect_B] := LD_HL_Indirect_B;
1362 Instructions[in_LD_HL_Indirect_C] := LD_HL_Indirect_C;
1363 Instructions[in_LD_HL_Indirect_D] := LD_HL_Indirect_D;
1364 Instructions[in_LD_HL_Indirect_E] := LD_HL_Indirect_E;
1365 Instructions[in_LD_HL_Indirect_H] := LD_HL_Indirect_H;
1366 Instructions[in_LD_HL_Indirect_L] := LD_HL_Indirect_L;
1367 Instructions[in_HALT] := HALT;
1368 Instructions[in_LD_HL_Indirect_A] := LD_HL_Indirect_A;
1369 Instructions[in_LD_A_B] := LD_A_B;
1370 Instructions[in_LD_A_C] := LD_A_C;
1371 Instructions[in_LD_A_D] := LD_A_D;
1372 Instructions[in_LD_A_E] := LD_A_E;
1373 Instructions[in_LD_A_H] := LD_A_H;
1374 Instructions[in_LD_A_L] := LD_A_L;
1375 Instructions[in_LD_A_HL_Indirect] := LD_A_HL_Indirect;
1376 Instructions[in_LD_A_A] := LD_A_A;
1377 Instructions[in_ADD_A_B] := ADD_A_B;
1378 Instructions[in_ADD_A_C] := ADD_A_C;
1379 Instructions[in_ADD_A_D] := ADD_A_D;
1380 Instructions[in_ADD_A_E] := ADD_A_E;
1381 Instructions[in_ADD_A_H] := ADD_A_H;
1382 Instructions[in_ADD_A_L] := ADD_A_L;
1383 Instructions[in_ADD_A_HL_Indirect] := ADD_A_HL_Indirect;
1384 Instructions[in_ADD_A_A] := ADD_A_A;
1385 Instructions[in_ADC_A_B] := ADC_A_B;
1386 Instructions[in_ADC_A_C] := ADC_A_C;
1387 Instructions[in_ADC_A_D] := ADC_A_D;
1388 Instructions[in_ADC_A_E] := ADC_A_E;
1389 Instructions[in_ADC_A_H] := ADC_A_H;
1390 Instructions[in_ADC_A_L] := ADC_A_L;
1391 Instructions[in_ADC_A_HL_Indirect] := ADC_A_HL_Indirect;
1392 Instructions[in_ADC_A_A] := ADC_A_A;
1393 Instructions[in_SUB_B] := SUB_B;
1394 Instructions[in_SUB_C] := SUB_C;
1395 Instructions[in_SUB_D] := SUB_D;
1396 Instructions[in_SUB_E] := SUB_E;
1397 Instructions[in_SUB_H] := SUB_H;
1398 Instructions[in_SUB_L] := SUB_L;
1399 Instructions[in_SUB_HL_Indirect] := SUB_HL_Indirect;
1400 Instructions[in_SUB_A] := SUB_A;
1401 Instructions[in_SBC_A_B] := SBC_A_B;
1402 Instructions[in_SBC_A_C] := SBC_A_C;
1403 Instructions[in_SBC_A_D] := SBC_A_D;
1404 Instructions[in_SBC_A_E] := SBC_A_E;
1405 Instructions[in_SBC_A_H] := SBC_A_H;
1406 Instructions[in_SBC_A_L] := SBC_A_L;
1407 Instructions[in_SBC_A_HL_Indirect] := SBC_A_HL_Indirect;
1408 Instructions[in_SBC_A_A] := SBC_A_A;
1409 Instructions[in_AND_B] := AND_B;
1410 Instructions[in_AND_C] := AND_C;
1411 Instructions[in_AND_D] := AND_D;
1412 Instructions[in_AND_E] := AND_E;
1413 Instructions[in_AND_H] := AND_H;
1414 Instructions[in_AND_L] := AND_L;
1415 Instructions[in_AND_HL_Indirect] := AND_HL_Indirect;
1416 Instructions[in_AND_A] := AND_A;
1417 Instructions[in_XOR_B] := XOR_B;
1418 Instructions[in_XOR_C] := XOR_C;
1419 Instructions[in_XOR_D] := XOR_D;
1420 Instructions[in_XOR_E] := XOR_E;
1421 Instructions[in_XOR_H] := XOR_H;
1422 Instructions[in_XOR_L] := XOR_L;
1423 Instructions[in_XOR_HL_Indirect] := XOR_HL_Indirect;
1424 Instructions[in_XOR_A] := XOR_A;
1425 Instructions[in_OR_B] := OR_B;
1426 Instructions[in_OR_C] := OR_C;
1427 Instructions[in_OR_D] := OR_D;
1428 Instructions[in_OR_E] := OR_E;
1429 Instructions[in_OR_H] := OR_H;
1430 Instructions[in_OR_L] := OR_L;
1431 Instructions[in_OR_HL_Indirect] := OR_HL_Indirect;
1432 Instructions[in_OR_A] := OR_A;
1433 Instructions[in_CP_B] := CP_B;
1434 Instructions[in_CP_C] := CP_C;
1435 Instructions[in_CP_D] := CP_D;
1436 Instructions[in_CP_E] := CP_E;
1437 Instructions[in_CP_H] := CP_H;
1438 Instructions[in_CP_L] := CP_L;
1439 Instructions[in_CP_HL_Indirect] := CP_HL_Indirect;
1440 Instructions[in_CP_A] := CP_A;
1441 Instructions[in_RET_NZ] := RET_NZ;
1442 Instructions[in_POP_BC] := POP_BC;
1443 Instructions[in_JP_NZ_NN] := JP_NZ_NN;
1444 Instructions[in_JP_NN] := JP_NN;
1445 Instructions[in_CALL_NZ_NN] := CALL_NZ_NN;
1446 Instructions[in_PUSH_BC] := PUSH_BC;
1447 Instructions[in_ADD_A_N] := ADD_A_N;
1448 Instructions[in_RST_00H] := RST_00H;
1449 Instructions[in_RET_Z] := RET_Z;
1450 Instructions[in_RET] := RET;
1451 Instructions[in_JP_Z_NN] := JP_Z_NN;
1452 Instructions[in_CALL_Z_NN] := CALL_Z_NN;
1453 Instructions[in_CALL_NN] := CALL_NN;
1454 Instructions[in_ADC_A_N] := ADC_A_N;
1455 Instructions[in_RST_08H] := RST_08H;
1456 Instructions[in_RET_NC] := RET_NC;
1457 Instructions[in_POP_DE] := POP_DE;
1458 Instructions[in_JP_NC_NN] := JP_NC_NN;
1459 Instructions[in_OUT_N_Indirect_A] := OUT_N_Indirect_A;
1460 Instructions[in_CALL_NC_NN] := CALL_NC_NN;
1461 Instructions[in_PUSH_DE] := PUSH_DE;
1462 Instructions[in_SUB_N] := SUB_N;
1463 Instructions[in_RST_10H] := RST_10H;
1464 Instructions[in_RET_C] := RET_C;
1465 Instructions[in_EXX] := EXX;
1466 Instructions[in_JP_C_NN] := JP_C_NN;
1467 Instructions[in_IN_A_N_Indirect] := IN_A_N_Indirect;
1468 Instructions[in_CALL_C_NN] := CALL_C_NN;
1469 Instructions[in_SBC_A_N] := SBC_A_N;
1470 Instructions[in_RST_18H] := RST_18H;
1471 Instructions[in_RET_PO] := RET_PO;
1472 Instructions[in_POP_HL] := POP_HL;
1473 Instructions[in_JP_PO_NN] := JP_PO_NN;
1474 Instructions[in_EX_SP_Indirect_HL] := EX_SP_Indirect_HL;
1475 Instructions[in_CALL_PO_NN] := CALL_PO_NN;
1476 Instructions[in_PUSH_HL] := PUSH_HL;
1477 Instructions[in_AND_N] := AND_N;
1478 Instructions[in_RST_20H] := RST_20H;
1479 Instructions[in_RET_PE] := RET_PE;
1480 Instructions[in_JP_HL_Indirect] := JP_HL_Indirect;
1481 Instructions[in_JP_PE_NN] := JP_PE_NN;
1482 Instructions[in_EX_DE_HL] := EX_DE_HL;
1483 Instructions[in_CALL_PE_NN] := CALL_PE_NN;
1484 Instructions[in_XOR_N] := XOR_N;
1485 Instructions[in_RST_28H] := RST_28H;
1486 Instructions[in_RET_P] := RET_P;
1487 Instructions[in_POP_AF] := POP_AF;
1488 Instructions[in_JP_P_NN] := JP_P_NN;
1489 Instructions[in_DI] := DI;
1490 Instructions[in_CALL_P_NN] := CALL_P_NN;
1491 Instructions[in_PUSH_AF] := PUSH_AF;
1492 Instructions[in_OR_N] := OR_N;
1493 Instructions[in_RST_30H] := RST_30H;
1494 Instructions[in_RET_M] := RET_M;
1495 Instructions[in_LD_SP_HL] := LD_SP_HL;
1496 Instructions[in_JP_M_NN] := JP_M_NN;
1497 Instructions[in_EI] := EI;
1498 Instructions[in_CALL_M_NN] := CALL_M_NN;
1499 Instructions[in_CP_N] := CP_N;
1500 Instructions[in_RST_38H] := RST_38H;
1501 Instructions[in_IN_B_C_Indirect] := IN_B_C_Indirect;
1502 Instructions[in_OUT_C_Indirect_B] := OUT_C_Indirect_B;
1503 Instructions[in_SBC_HL_BC] := SBC_HL_BC;
1504 Instructions[in_LD_NN_Indirect_BC] := LD_NN_Indirect_BC;
1505 Instructions[in_NEG] := NEG;
1506 Instructions[in_RETN] := RETN;
1507 Instructions[in_IM_0] := IM_0;
1508 Instructions[in_LD_I_A] := LD_I_A;
1509 Instructions[in_IN_C_C_Indirect] := IN_C_C_Indirect;
1510 Instructions[in_OUT_C_Indirect_C] := OUT_C_Indirect_C;
1511 Instructions[in_ADC_HL_BC] := ADC_HL_BC;
1512 Instructions[in_LD_BC_NN_Indirect] := LD_BC_NN_Indirect;
1513 Instructions[in_RETI] := RETI;
1514 Instructions[in_LD_R_A] := LD_R_A;
1515 Instructions[in_IN_D_C_Indirect] := IN_D_C_Indirect;
1516 Instructions[in_OUT_C_Indirect_D] := OUT_C_Indirect_D;
1517 Instructions[in_SBC_HL_DE] := SBC_HL_DE;
1518 Instructions[in_LD_NN_Indirect_DE] := LD_NN_Indirect_DE;
1519 Instructions[in_IM_1] := IM_1;
1520 Instructions[in_LD_A_I] := LD_A_I;
1521 Instructions[in_IN_E_C_Indirect] := IN_E_C_Indirect;
1522 Instructions[in_OUT_C_Indirect_E] := OUT_C_Indirect_E;
1523 Instructions[in_ADC_HL_DE] := ADC_HL_DE;
1524 Instructions[in_LD_DE_NN_Indirect] := LD_DE_NN_Indirect;
1525 Instructions[in_IM_2] := IM_2;
1526 Instructions[in_LD_A_R] := LD_A_R;
1527 Instructions[in_IN_H_C_Indirect] := IN_H_C_Indirect;
1528 Instructions[in_OUT_C_Indirect_H] := OUT_C_Indirect_H;
1529 Instructions[in_SBC_HL_HL] := SBC_HL_HL;
1530 Instructions[in_RRD] := RRD;
1531 Instructions[in_IN_L_C_Indirect] := IN_L_C_Indirect;
1532 Instructions[in_OUT_C_Indirect_L] := OUT_C_Indirect_L;
1533 Instructions[in_ADC_HL_HL] := ADC_HL_HL;
1534 Instructions[in_RLD] := RLD;
1535 Instructions[in_SBC_HL_SP] := SBC_HL_SP;
1536 Instructions[in_LD_NN_Indirect_SP] := LD_NN_Indirect_SP;
1537 Instructions[in_IN_A_C_Indirect] := IN_A_C_Indirect;
1538 Instructions[in_OUT_C_Indirect_A] := OUT_C_Indirect_A;
1539 Instructions[in_ADC_HL_SP] := ADC_HL_SP;
1540 Instructions[in_LD_SP_NN_Indirect] := LD_SP_NN_Indirect;
1541 Instructions[in_LDI] := LDI;
1542 Instructions[in_CPI] := CPI;
1543 Instructions[in_INI] := INI;
1544 Instructions[in_OUTI] := OUTI;
1545 Instructions[in_LDD] := LDD;
1546 Instructions[in_CPD] := CPD;
1547 Instructions[in_IND] := IND;
1548 Instructions[in_OUTD] := OUTD;
1549 Instructions[in_LDIR] := LDIR;
1550 Instructions[in_CPIR] := CPIR;
1551 Instructions[in_INIR] := INIR;
1552 Instructions[in_OTIR] := OTIR;
1553 Instructions[in_LDDR] := LDDR;
1554 Instructions[in_CPDR] := CPDR;
1555 Instructions[in_INDR] := INDR;
1556 Instructions[in_OTDR] := OTDR;
1557 Instructions[in_RLC_B] := RLC_B;
1558 Instructions[in_RLC_C] := RLC_C;
1559 Instructions[in_RLC_D] := RLC_D;
1560 Instructions[in_RLC_E] := RLC_E;
1561 Instructions[in_RLC_H] := RLC_H;
1562 Instructions[in_RLC_L] := RLC_L;
1563 Instructions[in_RLC_HL_Indirect] := RLC_HL_Indirect;
1564 Instructions[in_RLC_A] := RLC_A;
1565 Instructions[in_RRC_B] := RRC_B;
1566 Instructions[in_RRC_C] := RRC_C;
1567 Instructions[in_RRC_D] := RRC_D;
1568 Instructions[in_RRC_E] := RRC_E;
1569 Instructions[in_RRC_H] := RRC_H;
1570 Instructions[in_RRC_L] := RRC_L;
1571 Instructions[in_RRC_HL_Indirect] := RRC_HL_Indirect;
1572 Instructions[in_RRC_A] := RRC_A;
1573 Instructions[in_RL_B] := RL_B;
1574 Instructions[in_RL_C] := RL_C;
1575 Instructions[in_RL_D] := RL_D;
1576 Instructions[in_RL_E] := RL_E;
1577 Instructions[in_RL_H] := RL_H;
1578 Instructions[in_RL_L] := RL_L;
1579 Instructions[in_RL_HL_Indirect] := RL_HL_Indirect;
1580 Instructions[in_RL_A] := RL_A;
1581 Instructions[in_RR_B] := RR_B;
1582 Instructions[in_RR_C] := RR_C;
1583 Instructions[in_RR_D] := RR_D;
1584 Instructions[in_RR_E] := RR_E;
1585 Instructions[in_RR_H] := RR_H;
1586 Instructions[in_RR_L] := RR_L;
1587 Instructions[in_RR_HL_Indirect] := RR_HL_Indirect;
1588 Instructions[in_RR_A] := RR_A;
1589 Instructions[in_SLA_B] := SLA_B;
1590 Instructions[in_SLA_C] := SLA_C;
1591 Instructions[in_SLA_D] := SLA_D;
1592 Instructions[in_SLA_E] := SLA_E;
1593 Instructions[in_SLA_H] := SLA_H;
1594 Instructions[in_SLA_L] := SLA_L;
1595 Instructions[in_SLA_HL_Indirect] := SLA_HL_Indirect;
1596 Instructions[in_SLA_A] := SLA_A;
1597 Instructions[in_SRA_B] := SRA_B;
1598 Instructions[in_SRA_C] := SRA_C;
1599 Instructions[in_SRA_D] := SRA_D;
1600 Instructions[in_SRA_E] := SRA_E;
1601 Instructions[in_SRA_H] := SRA_H;
1602 Instructions[in_SRA_L] := SRA_L;
1603 Instructions[in_SRA_HL_Indirect] := SRA_HL_Indirect;
1604 Instructions[in_SRA_A] := SRA_A;
1605 Instructions[in_SRL_B] := SRL_B;
1606 Instructions[in_SRL_C] := SRL_C;
1607 Instructions[in_SRL_D] := SRL_D;
1608 Instructions[in_SRL_E] := SRL_E;
1609 Instructions[in_SRL_H] := SRL_H;
1610 Instructions[in_SRL_L] := SRL_L;
1611 Instructions[in_SRL_HL_Indirect] := SRL_HL_Indirect;
1612 Instructions[in_SRL_A] := SRL_A;
1613 Instructions[in_BIT_0_B] := BIT_0_B;
1614 Instructions[in_BIT_0_C] := BIT_0_C;
1615 Instructions[in_BIT_0_D] := BIT_0_D;
1616 Instructions[in_BIT_0_E] := BIT_0_E;
1617 Instructions[in_BIT_0_H] := BIT_0_H;
1618 Instructions[in_BIT_0_L] := BIT_0_L;
1619 Instructions[in_BIT_0_HL_Indirect] := BIT_0_HL_Indirect;
1620 Instructions[in_BIT_0_A] := BIT_0_A;
1621 Instructions[in_BIT_1_B] := BIT_1_B;
1622 Instructions[in_BIT_1_C] := BIT_1_C;
1623 Instructions[in_BIT_1_D] := BIT_1_D;
1624 Instructions[in_BIT_1_E] := BIT_1_E;
1625 Instructions[in_BIT_1_H] := BIT_1_H;
1626 Instructions[in_BIT_1_L] := BIT_1_L;
1627 Instructions[in_BIT_1_HL_Indirect] := BIT_1_HL_Indirect;
1628 Instructions[in_BIT_1_A] := BIT_1_A;
1629 Instructions[in_BIT_2_B] := BIT_2_B;
1630 Instructions[in_BIT_2_C] := BIT_2_C;
1631 Instructions[in_BIT_2_D] := BIT_2_D;
1632 Instructions[in_BIT_2_E] := BIT_2_E;
1633 Instructions[in_BIT_2_H] := BIT_2_H;
1634 Instructions[in_BIT_2_L] := BIT_2_L;
1635 Instructions[in_BIT_2_HL_Indirect] := BIT_2_HL_Indirect;
1636 Instructions[in_BIT_2_A] := BIT_2_A;
1637 Instructions[in_BIT_3_B] := BIT_3_B;
1638 Instructions[in_BIT_3_C] := BIT_3_C;
1639 Instructions[in_BIT_3_D] := BIT_3_D;
1640 Instructions[in_BIT_3_E] := BIT_3_E;
1641 Instructions[in_BIT_3_H] := BIT_3_H;
1642 Instructions[in_BIT_3_L] := BIT_3_L;
1643 Instructions[in_BIT_3_HL_Indirect] := BIT_3_HL_Indirect;
1644 Instructions[in_BIT_3_A] := BIT_3_A;
1645 Instructions[in_BIT_4_B] := BIT_4_B;
1646 Instructions[in_BIT_4_C] := BIT_4_C;
1647 Instructions[in_BIT_4_D] := BIT_4_D;
1648 Instructions[in_BIT_4_E] := BIT_4_E;
1649 Instructions[in_BIT_4_H] := BIT_4_H;
1650 Instructions[in_BIT_4_L] := BIT_4_L;
1651 Instructions[in_BIT_4_HL_Indirect] := BIT_4_HL_Indirect;
1652 Instructions[in_BIT_4_A] := BIT_4_A;
1653 Instructions[in_BIT_5_B] := BIT_5_B;
1654 Instructions[in_BIT_5_C] := BIT_5_C;
1655 Instructions[in_BIT_5_D] := BIT_5_D;
1656 Instructions[in_BIT_5_E] := BIT_5_E;
1657 Instructions[in_BIT_5_H] := BIT_5_H;
1658 Instructions[in_BIT_5_L] := BIT_5_L;
1659 Instructions[in_BIT_5_HL_Indirect] := BIT_5_HL_Indirect;
1660 Instructions[in_BIT_5_A] := BIT_5_A;
1661 Instructions[in_BIT_6_B] := BIT_6_B;
1662 Instructions[in_BIT_6_C] := BIT_6_C;
1663 Instructions[in_BIT_6_D] := BIT_6_D;
1664 Instructions[in_BIT_6_E] := BIT_6_E;
1665 Instructions[in_BIT_6_H] := BIT_6_H;
1666 Instructions[in_BIT_6_L] := BIT_6_L;
1667 Instructions[in_BIT_6_HL_Indirect] := BIT_6_HL_Indirect;
1668 Instructions[in_BIT_6_A] := BIT_6_A;
1669 Instructions[in_BIT_7_B] := BIT_7_B;
1670 Instructions[in_BIT_7_C] := BIT_7_C;
1671 Instructions[in_BIT_7_D] := BIT_7_D;
1672 Instructions[in_BIT_7_E] := BIT_7_E;
1673 Instructions[in_BIT_7_H] := BIT_7_H;
1674 Instructions[in_BIT_7_L] := BIT_7_L;
1675 Instructions[in_BIT_7_HL_Indirect] := BIT_7_HL_Indirect;
1676 Instructions[in_BIT_7_A] := BIT_7_A;
1677 Instructions[in_RES_0_B] := RES_0_B;
1678 Instructions[in_RES_0_C] := RES_0_C;
1679 Instructions[in_RES_0_D] := RES_0_D;
1680 Instructions[in_RES_0_E] := RES_0_E;
1681 Instructions[in_RES_0_H] := RES_0_H;
1682 Instructions[in_RES_0_L] := RES_0_L;
1683 Instructions[in_RES_0_HL_Indirect] := RES_0_HL_Indirect;
1684 Instructions[in_RES_0_A] := RES_0_A;
1685 Instructions[in_RES_1_B] := RES_1_B;
1686 Instructions[in_RES_1_C] := RES_1_C;
1687 Instructions[in_RES_1_D] := RES_1_D;
1688 Instructions[in_RES_1_E] := RES_1_E;
1689 Instructions[in_RES_1_H] := RES_1_H;
1690 Instructions[in_RES_1_L] := RES_1_L;
1691 Instructions[in_RES_1_HL_Indirect] := RES_1_HL_Indirect;
1692 Instructions[in_RES_1_A] := RES_1_A;
1693 Instructions[in_RES_2_B] := RES_2_B;
1694 Instructions[in_RES_2_C] := RES_2_C;
1695 Instructions[in_RES_2_D] := RES_2_D;
1696 Instructions[in_RES_2_E] := RES_2_E;
1697 Instructions[in_RES_2_H] := RES_2_H;
1698 Instructions[in_RES_2_L] := RES_2_L;
1699 Instructions[in_RES_2_HL_Indirect] := RES_2_HL_Indirect;
1700 Instructions[in_RES_2_A] := RES_2_A;
1701 Instructions[in_RES_3_B] := RES_3_B;
1702 Instructions[in_RES_3_C] := RES_3_C;
1703 Instructions[in_RES_3_D] := RES_3_D;
1704 Instructions[in_RES_3_E] := RES_3_E;
1705 Instructions[in_RES_3_H] := RES_3_H;
1706 Instructions[in_RES_3_L] := RES_3_L;
1707 Instructions[in_RES_3_HL_Indirect] := RES_3_HL_Indirect;
1708 Instructions[in_RES_3_A] := RES_3_A;
1709 Instructions[in_RES_4_B] := RES_4_B;
1710 Instructions[in_RES_4_C] := RES_4_C;
1711 Instructions[in_RES_4_D] := RES_4_D;
1712 Instructions[in_RES_4_E] := RES_4_E;
1713 Instructions[in_RES_4_H] := RES_4_H;
1714 Instructions[in_RES_4_L] := RES_4_L;
1715 Instructions[in_RES_4_HL_Indirect] := RES_4_HL_Indirect;
1716 Instructions[in_RES_4_A] := RES_4_A;
1717 Instructions[in_RES_5_B] := RES_5_B;
1718 Instructions[in_RES_5_C] := RES_5_C;
1719 Instructions[in_RES_5_D] := RES_5_D;
1720 Instructions[in_RES_5_E] := RES_5_E;
1721 Instructions[in_RES_5_H] := RES_5_H;
1722 Instructions[in_RES_5_L] := RES_5_L;
1723 Instructions[in_RES_5_HL_Indirect] := RES_5_HL_Indirect;
1724 Instructions[in_RES_5_A] := RES_5_A;
1725 Instructions[in_RES_6_B] := RES_6_B;
1726 Instructions[in_RES_6_C] := RES_6_C;
1727 Instructions[in_RES_6_D] := RES_6_D;
1728 Instructions[in_RES_6_E] := RES_6_E;
1729 Instructions[in_RES_6_H] := RES_6_H;
1730 Instructions[in_RES_6_L] := RES_6_L;
1731 Instructions[in_RES_6_HL_Indirect] := RES_6_HL_Indirect;
1732 Instructions[in_RES_6_A] := RES_6_A;
1733 Instructions[in_RES_7_B] := RES_7_B;
1734 Instructions[in_RES_7_C] := RES_7_C;
1735 Instructions[in_RES_7_D] := RES_7_D;
1736 Instructions[in_RES_7_E] := RES_7_E;
1737 Instructions[in_RES_7_H] := RES_7_H;
1738 Instructions[in_RES_7_L] := RES_7_L;
1739 Instructions[in_RES_7_HL_Indirect] := RES_7_HL_Indirect;
1740 Instructions[in_RES_7_A] := RES_7_A;
1741 Instructions[in_SET_0_B] := SET_0_B;
1742 Instructions[in_SET_0_C] := SET_0_C;
1743 Instructions[in_SET_0_D] := SET_0_D;
1744 Instructions[in_SET_0_E] := SET_0_E;
1745 Instructions[in_SET_0_H] := SET_0_H;
1746 Instructions[in_SET_0_L] := SET_0_L;
1747 Instructions[in_SET_0_HL_Indirect] := SET_0_HL_Indirect;
1748 Instructions[in_SET_0_A] := SET_0_A;
1749 Instructions[in_SET_1_B] := SET_1_B;
1750 Instructions[in_SET_1_C] := SET_1_C;
1751 Instructions[in_SET_1_D] := SET_1_D;
1752 Instructions[in_SET_1_E] := SET_1_E;
1753 Instructions[in_SET_1_H] := SET_1_H;
1754 Instructions[in_SET_1_L] := SET_1_L;
1755 Instructions[in_SET_1_HL_Indirect] := SET_1_HL_Indirect;
1756 Instructions[in_SET_1_A] := SET_1_A;
1757 Instructions[in_SET_2_B] := SET_2_B;
1758 Instructions[in_SET_2_C] := SET_2_C;
1759 Instructions[in_SET_2_D] := SET_2_D;
1760 Instructions[in_SET_2_E] := SET_2_E;
1761 Instructions[in_SET_2_H] := SET_2_H;
1762 Instructions[in_SET_2_L] := SET_2_L;
1763 Instructions[in_SET_2_HL_Indirect] := SET_2_HL_Indirect;
1764 Instructions[in_SET_2_A] := SET_2_A;
1765 Instructions[in_SET_3_B] := SET_3_B;
1766 Instructions[in_SET_3_C] := SET_3_C;
1767 Instructions[in_SET_3_D] := SET_3_D;
1768 Instructions[in_SET_3_E] := SET_3_E;
1769 Instructions[in_SET_3_H] := SET_3_H;
1770 Instructions[in_SET_3_L] := SET_3_L;
1771 Instructions[in_SET_3_HL_Indirect] := SET_3_HL_Indirect;
1772 Instructions[in_SET_3_A] := SET_3_A;
1773 Instructions[in_SET_4_B] := SET_4_B;
1774 Instructions[in_SET_4_C] := SET_4_C;
1775 Instructions[in_SET_4_D] := SET_4_D;
1776 Instructions[in_SET_4_E] := SET_4_E;
1777 Instructions[in_SET_4_H] := SET_4_H;
1778 Instructions[in_SET_4_L] := SET_4_L;
1779 Instructions[in_SET_4_HL_Indirect] := SET_4_HL_Indirect;
1780 Instructions[in_SET_4_A] := SET_4_A;
1781 Instructions[in_SET_5_B] := SET_5_B;
1782 Instructions[in_SET_5_C] := SET_5_C;
1783 Instructions[in_SET_5_D] := SET_5_D;
1784 Instructions[in_SET_5_E] := SET_5_E;
1785 Instructions[in_SET_5_H] := SET_5_H;
1786 Instructions[in_SET_5_L] := SET_5_L;
1787 Instructions[in_SET_5_HL_Indirect] := SET_5_HL_Indirect;
1788 Instructions[in_SET_5_A] := SET_5_A;
1789 Instructions[in_SET_6_B] := SET_6_B;
1790 Instructions[in_SET_6_C] := SET_6_C;
1791 Instructions[in_SET_6_D] := SET_6_D;
1792 Instructions[in_SET_6_E] := SET_6_E;
1793 Instructions[in_SET_6_H] := SET_6_H;
1794 Instructions[in_SET_6_L] := SET_6_L;
1795 Instructions[in_SET_6_HL_Indirect] := SET_6_HL_Indirect;
1796 Instructions[in_SET_6_A] := SET_6_A;
1797 Instructions[in_SET_7_B] := SET_7_B;
1798 Instructions[in_SET_7_C] := SET_7_C;
1799 Instructions[in_SET_7_D] := SET_7_D;
1800 Instructions[in_SET_7_E] := SET_7_E;
1801 Instructions[in_SET_7_H] := SET_7_H;
1802 Instructions[in_SET_7_L] := SET_7_L;
1803 Instructions[in_SET_7_HL_Indirect] := SET_7_HL_Indirect;
1804 Instructions[in_SET_7_A] := SET_7_A;
1805 Instructions[in_ADD_IX_BC] := ADD_IX_BC;
1806 Instructions[in_ADD_IX_DE] := ADD_IX_DE;
1807 Instructions[in_LD_IX_NN] := LD_IX_NN;
1808 Instructions[in_LD_NN_Indirect_IX] := LD_NN_Indirect_IX;
1809 Instructions[in_INC_IX] := INC_IX;
1810 Instructions[in_ADD_IX_IX] := ADD_IX_IX;
1811 Instructions[in_LD_IX_NN_Indirect] := LD_IX_NN_Indirect;
1812 Instructions[in_DEC_IX] := DEC_IX;
1813 Instructions[in_INC_IX_Plus_D_Indirect] := INC_IX_Plus_D_Indirect;
1814 Instructions[in_DEC_IX_Plus_D_Indirect] := DEC_IX_Plus_D_Indirect;
1815 Instructions[in_LD_IX_Plus_D_Indirect_N] := LD_IX_Plus_D_Indirect_N;
1816 Instructions[in_ADD_IX_SP] := ADD_IX_SP;
1817 Instructions[in_LD_B_IX_Plus_D_Indirect] := LD_B_IX_Plus_D_Indirect;
1818 Instructions[in_LD_C_IX_Plus_D_Indirect] := LD_C_IX_Plus_D_Indirect;
1819 Instructions[in_LD_D_IX_Plus_D_Indirect] := LD_D_IX_Plus_D_Indirect;
1820 Instructions[in_LD_E_IX_Plus_D_Indirect] := LD_E_IX_Plus_D_Indirect;
1821 Instructions[in_LD_H_IX_Plus_D_Indirect] := LD_H_IX_Plus_D_Indirect;
1822 Instructions[in_LD_L_IX_Plus_D_Indirect] := LD_L_IX_Plus_D_Indirect;
1823 Instructions[in_LD_IX_Plus_D_Indirect_B] := LD_IX_Plus_D_Indirect_B;
1824 Instructions[in_LD_IX_Plus_D_Indirect_C] := LD_IX_Plus_D_Indirect_C;
1825 Instructions[in_LD_IX_Plus_D_Indirect_D] := LD_IX_Plus_D_Indirect_D;
1826 Instructions[in_LD_IX_Plus_D_Indirect_E] := LD_IX_Plus_D_Indirect_E;
1827 Instructions[in_LD_IX_Plus_D_Indirect_H] := LD_IX_Plus_D_Indirect_H;
1828 Instructions[in_LD_IX_Plus_D_Indirect_L] := LD_IX_Plus_D_Indirect_L;
1829 Instructions[in_LD_IX_Plus_D_Indirect_A] := LD_IX_Plus_D_Indirect_A;
1830 Instructions[in_LD_A_IX_Plus_D_Indirect] := LD_A_IX_Plus_D_Indirect;
1831 Instructions[in_ADD_A_IX_Plus_D_Indirect] := ADD_A_IX_Plus_D_Indirect;
1832 Instructions[in_ADC_A_IX_Plus_D_Indirect] := ADC_A_IX_Plus_D_Indirect;
1833 Instructions[in_SUB_IX_Plus_D_Indirect] := SUB_IX_Plus_D_Indirect;
1834 Instructions[in_SBC_A_IX_Plus_D_Indirect] := SBC_A_IX_Plus_D_Indirect;
1835 Instructions[in_AND_IX_Plus_D_Indirect] := AND_IX_Plus_D_Indirect;
1836 Instructions[in_XOR_IX_Plus_D_Indirect] := XOR_IX_Plus_D_Indirect;
1837 Instructions[in_OR_IX_Plus_D_Indirect] := OR_IX_Plus_D_Indirect;
1838 Instructions[in_CP_IX_Plus_D_Indirect] := CP_IX_Plus_D_Indirect;
1839 Instructions[in_POP_IX] := POP_IX;
1840 Instructions[in_EX_SP_Indirect_IX] := EX_SP_Indirect_IX;
1841 Instructions[in_PUSH_IX] := PUSH_IX;
1842 Instructions[in_JP_IX_Indirect] := JP_IX_Indirect;
1843 Instructions[in_LD_SP_IX] := LD_SP_IX;
1844 Instructions[in_RLC_IX_Plus_D_Indirect] := RLC_IX_Plus_D_Indirect;
1845 Instructions[in_RRC_IX_Plus_D_Indirect] := RRC_IX_Plus_D_Indirect;
1846 Instructions[in_RL_IX_Plus_D_Indirect] := RL_IX_Plus_D_Indirect;
1847 Instructions[in_RR_IX_Plus_D_Indirect] := RR_IX_Plus_D_Indirect;
1848 Instructions[in_SLA_IX_Plus_D_Indirect] := SLA_IX_Plus_D_Indirect;
1849 Instructions[in_SRA_IX_Plus_D_Indirect] := SRA_IX_Plus_D_Indirect;
1850 Instructions[in_SRL_IX_Plus_D_Indirect] := SRL_IX_Plus_D_Indirect;
1851 Instructions[in_BIT_0_IX_Plus_D_Indirect] := BIT_0_IX_Plus_D_Indirect;
1852 Instructions[in_BIT_1_IX_Plus_D_Indirect] := BIT_1_IX_Plus_D_Indirect;
1853 Instructions[in_BIT_2_IX_Plus_D_Indirect] := BIT_2_IX_Plus_D_Indirect;
1854 Instructions[in_BIT_3_IX_Plus_D_Indirect] := BIT_3_IX_Plus_D_Indirect;
1855 Instructions[in_BIT_4_IX_Plus_D_Indirect] := BIT_4_IX_Plus_D_Indirect;
1856 Instructions[in_BIT_5_IX_Plus_D_Indirect] := BIT_5_IX_Plus_D_Indirect;
1857 Instructions[in_BIT_6_IX_Plus_D_Indirect] := BIT_6_IX_Plus_D_Indirect;
1858 Instructions[in_BIT_7_IX_Plus_D_Indirect] := BIT_7_IX_Plus_D_Indirect;
1859 Instructions[in_RES_0_IX_Plus_D_Indirect] := RES_0_IX_Plus_D_Indirect;
1860 Instructions[in_RES_1_IX_Plus_D_Indirect] := RES_1_IX_Plus_D_Indirect;
1861 Instructions[in_RES_2_IX_Plus_D_Indirect] := RES_2_IX_Plus_D_Indirect;
1862 Instructions[in_RES_3_IX_Plus_D_Indirect] := RES_3_IX_Plus_D_Indirect;
1863 Instructions[in_RES_4_IX_Plus_D_Indirect] := RES_4_IX_Plus_D_Indirect;
1864 Instructions[in_RES_5_IX_Plus_D_Indirect] := RES_5_IX_Plus_D_Indirect;
1865 Instructions[in_RES_6_IX_Plus_D_Indirect] := RES_6_IX_Plus_D_Indirect;
1866 Instructions[in_RES_7_IX_Plus_D_Indirect] := RES_7_IX_Plus_D_Indirect;
1867 Instructions[in_SET_0_IX_Plus_D_Indirect] := SET_0_IX_Plus_D_Indirect;
1868 Instructions[in_SET_1_IX_Plus_D_Indirect] := SET_1_IX_Plus_D_Indirect;
1869 Instructions[in_SET_2_IX_Plus_D_Indirect] := SET_2_IX_Plus_D_Indirect;
1870 Instructions[in_SET_3_IX_Plus_D_Indirect] := SET_3_IX_Plus_D_Indirect;
1871 Instructions[in_SET_4_IX_Plus_D_Indirect] := SET_4_IX_Plus_D_Indirect;
1872 Instructions[in_SET_5_IX_Plus_D_Indirect] := SET_5_IX_Plus_D_Indirect;
1873 Instructions[in_SET_6_IX_Plus_D_Indirect] := SET_6_IX_Plus_D_Indirect;
1874 Instructions[in_SET_7_IX_Plus_D_Indirect] := SET_7_IX_Plus_D_Indirect;
1875 Instructions[in_ADD_IY_BC] := ADD_IY_BC;
1876 Instructions[in_ADD_IY_DE] := ADD_IY_DE;
1877 Instructions[in_LD_IY_NN] := LD_IY_NN;
1878 Instructions[in_LD_NN_Indirect_IY] := LD_NN_Indirect_IY;
1879 Instructions[in_INC_IY] := INC_IY;
1880 Instructions[in_ADD_IY_IY] := ADD_IY_IY;
1881 Instructions[in_LD_IY_NN_Indirect] := LD_IY_NN_Indirect;
1882 Instructions[in_DEC_IY] := DEC_IY;
1883 Instructions[in_INC_IY_Plus_D_Indirect] := INC_IY_Plus_D_Indirect;
1884 Instructions[in_DEC_IY_Plus_D_Indirect] := DEC_IY_Plus_D_Indirect;
1885 Instructions[in_LD_IY_Plus_D_Indirect_N] := LD_IY_Plus_D_Indirect_N;
1886 Instructions[in_ADD_IY_SP] := ADD_IY_SP;
1887 Instructions[in_LD_B_IY_Plus_D_Indirect] := LD_B_IY_Plus_D_Indirect;
1888 Instructions[in_LD_C_IY_Plus_D_Indirect] := LD_C_IY_Plus_D_Indirect;
1889 Instructions[in_LD_D_IY_Plus_D_Indirect] := LD_D_IY_Plus_D_Indirect;
1890 Instructions[in_LD_E_IY_Plus_D_Indirect] := LD_E_IY_Plus_D_Indirect;
1891 Instructions[in_LD_H_IY_Plus_D_Indirect] := LD_H_IY_Plus_D_Indirect;
1892 Instructions[in_LD_L_IY_Plus_D_Indirect] := LD_L_IY_Plus_D_Indirect;
1893 Instructions[in_LD_IY_Plus_D_Indirect_B] := LD_IY_Plus_D_Indirect_B;
1894 Instructions[in_LD_IY_Plus_D_Indirect_C] := LD_IY_Plus_D_Indirect_C;
1895 Instructions[in_LD_IY_Plus_D_Indirect_D] := LD_IY_Plus_D_Indirect_D;
1896 Instructions[in_LD_IY_Plus_D_Indirect_E] := LD_IY_Plus_D_Indirect_E;
1897 Instructions[in_LD_IY_Plus_D_Indirect_H] := LD_IY_Plus_D_Indirect_H;
1898 Instructions[in_LD_IY_Plus_D_Indirect_L] := LD_IY_Plus_D_Indirect_L;
1899 Instructions[in_LD_IY_Plus_D_Indirect_A] := LD_IY_Plus_D_Indirect_A;
1900 Instructions[in_LD_A_IY_Plus_D_Indirect] := LD_A_IY_Plus_D_Indirect;
1901 Instructions[in_ADD_A_IY_Plus_D_Indirect] := ADD_A_IY_Plus_D_Indirect;
1902 Instructions[in_ADC_A_IY_Plus_D_Indirect] := ADC_A_IY_Plus_D_Indirect;
1903 Instructions[in_SUB_IY_Plus_D_Indirect] := SUB_IY_Plus_D_Indirect;
1904 Instructions[in_SBC_A_IY_Plus_D_Indirect] := SBC_A_IY_Plus_D_Indirect;
1905 Instructions[in_AND_IY_Plus_D_Indirect] := AND_IY_Plus_D_Indirect;
1906 Instructions[in_XOR_IY_Plus_D_Indirect] := XOR_IY_Plus_D_Indirect;
1907 Instructions[in_OR_IY_Plus_D_Indirect] := OR_IY_Plus_D_Indirect;
1908 Instructions[in_CP_IY_Plus_D_Indirect] := CP_IY_Plus_D_Indirect;
1909 Instructions[in_POP_IY] := POP_IY;
1910 Instructions[in_EX_SP_Indirect_IY] := EX_SP_Indirect_IY;
1911 Instructions[in_PUSH_IY] := PUSH_IY;
1912 Instructions[in_JP_IY_Indirect] := JP_IY_Indirect;
1913 Instructions[in_LD_SP_IY] := LD_SP_IY;
1914 Instructions[in_RLC_IY_Plus_D_Indirect] := RLC_IY_Plus_D_Indirect;
1915 Instructions[in_RRC_IY_Plus_D_Indirect] := RRC_IY_Plus_D_Indirect;
1916 Instructions[in_RL_IY_Plus_D_Indirect] := RL_IY_Plus_D_Indirect;
1917 Instructions[in_RR_IY_Plus_D_Indirect] := RR_IY_Plus_D_Indirect;
1918 Instructions[in_SLA_IY_Plus_D_Indirect] := SLA_IY_Plus_D_Indirect;
1919 Instructions[in_SRA_IY_Plus_D_Indirect] := SRA_IY_Plus_D_Indirect;
1920 Instructions[in_SRL_IY_Plus_D_Indirect] := SRL_IY_Plus_D_Indirect;
1921 Instructions[in_BIT_0_IY_Plus_D_Indirect] := BIT_0_IY_Plus_D_Indirect;
1922 Instructions[in_BIT_1_IY_Plus_D_Indirect] := BIT_1_IY_Plus_D_Indirect;
1923 Instructions[in_BIT_2_IY_Plus_D_Indirect] := BIT_2_IY_Plus_D_Indirect;
1924 Instructions[in_BIT_3_IY_Plus_D_Indirect] := BIT_3_IY_Plus_D_Indirect;
1925 Instructions[in_BIT_4_IY_Plus_D_Indirect] := BIT_4_IY_Plus_D_Indirect;
1926 Instructions[in_BIT_5_IY_Plus_D_Indirect] := BIT_5_IY_Plus_D_Indirect;
1927 Instructions[in_BIT_6_IY_Plus_D_Indirect] := BIT_6_IY_Plus_D_Indirect;
1928 Instructions[in_BIT_7_IY_Plus_D_Indirect] := BIT_7_IY_Plus_D_Indirect;
1929 Instructions[in_RES_0_IY_Plus_D_Indirect] := RES_0_IY_Plus_D_Indirect;
1930 Instructions[in_RES_1_IY_Plus_D_Indirect] := RES_1_IY_Plus_D_Indirect;
1931 Instructions[in_RES_2_IY_Plus_D_Indirect] := RES_2_IY_Plus_D_Indirect;
1932 Instructions[in_RES_3_IY_Plus_D_Indirect] := RES_3_IY_Plus_D_Indirect;
1933 Instructions[in_RES_4_IY_Plus_D_Indirect] := RES_4_IY_Plus_D_Indirect;
1934 Instructions[in_RES_5_IY_Plus_D_Indirect] := RES_5_IY_Plus_D_Indirect;
1935 Instructions[in_RES_6_IY_Plus_D_Indirect] := RES_6_IY_Plus_D_Indirect;
1936 Instructions[in_RES_7_IY_Plus_D_Indirect] := RES_7_IY_Plus_D_Indirect;
1937 Instructions[in_SET_0_IY_Plus_D_Indirect] := SET_0_IY_Plus_D_Indirect;
1938 Instructions[in_SET_1_IY_Plus_D_Indirect] := SET_1_IY_Plus_D_Indirect;
1939 Instructions[in_SET_2_IY_Plus_D_Indirect] := SET_2_IY_Plus_D_Indirect;
1940 Instructions[in_SET_3_IY_Plus_D_Indirect] := SET_3_IY_Plus_D_Indirect;
1941 Instructions[in_SET_4_IY_Plus_D_Indirect] := SET_4_IY_Plus_D_Indirect;
1942 Instructions[in_SET_5_IY_Plus_D_Indirect] := SET_5_IY_Plus_D_Indirect;
1943 Instructions[in_SET_6_IY_Plus_D_Indirect] := SET_6_IY_Plus_D_Indirect;
1944 Instructions[in_SET_7_IY_Plus_D_Indirect] := SET_7_IY_Plus_D_Indirect;
1945end;
1946
1947procedure TCpuZ80.NOP;
1948begin
1949 // No operation
1950end;
1951
1952procedure TCpuZ80.LD_BC_NN;
1953begin
1954 BC.Value := ReadWord;
1955end;
1956
1957procedure TCpuZ80.LD_BC_Indirect_A;
1958begin
1959 DoWrite(BC.Value, AF.A);
1960end;
1961
1962procedure TCpuZ80.INC_BC;
1963begin
1964 IncWord(BC.Value);
1965end;
1966
1967procedure TCpuZ80.INC_B;
1968begin
1969 IncByte(BC.B);
1970end;
1971
1972procedure TCpuZ80.DEC_B;
1973begin
1974 DecByte(BC.B);
1975end;
1976
1977procedure TCpuZ80.LD_B_N;
1978begin
1979 BC.B := ReadByte;
1980end;
1981
1982procedure TCpuZ80.RLCA;
1983begin
1984 RlcByte(AF.A);
1985end;
1986
1987procedure TCpuZ80.EX_AF_AF_Pair;
1988var
1989 Temp: Word;
1990begin
1991 Temp := AF.Value;
1992 AF2.Value := AF.Value;
1993 AF.Value := Temp;
1994end;
1995
1996procedure TCpuZ80.ADD_HL_BC;
1997begin
1998 AddWord(HL.Value, BC.Value);
1999end;
2000
2001procedure TCpuZ80.LD_A_BC_Indirect;
2002begin
2003 AF.A := DoRead(BC.Value);
2004end;
2005
2006procedure TCpuZ80.DEC_BC;
2007begin
2008 DecWord(BC.Value);
2009end;
2010
2011procedure TCpuZ80.INC_C;
2012begin
2013 IncByte(BC.C);
2014end;
2015
2016procedure TCpuZ80.DEC_C;
2017begin
2018 DecByte(BC.C);
2019end;
2020
2021procedure TCpuZ80.LD_C_N;
2022begin
2023 BC.C := ReadByte;
2024end;
2025
2026procedure TCpuZ80.RRCA;
2027begin
2028 RrcByte(AF.A);
2029end;
2030
2031procedure TCpuZ80.DJNZ_D;
2032var
2033 Temp: ShortInt;
2034begin
2035 if BC.B = 0 then BC.B := $ff
2036 else Dec(BC.B);
2037 Temp := ShortInt(ReadByte);
2038 if BC.B <> 0 then
2039 PC := PC + Temp;
2040end;
2041
2042procedure TCpuZ80.LD_DE_NN;
2043begin
2044 DE.Value := ReadWord;
2045end;
2046
2047procedure TCpuZ80.LD_DE_Indirect_A;
2048begin
2049 DoWrite(DE.Value, AF.A);
2050end;
2051
2052procedure TCpuZ80.INC_DE;
2053begin
2054 IncWord(DE.Value);
2055end;
2056
2057procedure TCpuZ80.INC_D;
2058begin
2059 IncByte(DE.D);
2060end;
2061
2062procedure TCpuZ80.DEC_D;
2063begin
2064 DecByte(DE.D);
2065end;
2066
2067procedure TCpuZ80.LD_D_N;
2068begin
2069 DE.D := ReadByte;
2070end;
2071
2072procedure TCpuZ80.RLA;
2073var
2074 NewCarry: Boolean;
2075begin
2076 NewCarry := (AF.A and $80) > 0;
2077 AF.A := (AF.A shl 1) or Byte(Carry);
2078 Carry := NewCarry;
2079end;
2080
2081procedure TCpuZ80.JR_D;
2082begin
2083 Jr(True);
2084end;
2085
2086procedure TCpuZ80.ADD_HL_DE;
2087begin
2088 AddWord(HL.Value, DE.Value);
2089end;
2090
2091procedure TCpuZ80.LD_A_DE_Indirect;
2092begin
2093 AF.A := DoRead(DE.Value);
2094end;
2095
2096procedure TCpuZ80.DEC_DE;
2097begin
2098 DecWord(DE.Value);
2099end;
2100
2101procedure TCpuZ80.INC_E;
2102begin
2103 IncByte(DE.E);
2104end;
2105
2106procedure TCpuZ80.DEC_E;
2107begin
2108 DecByte(DE.E);
2109end;
2110
2111procedure TCpuZ80.LD_E_N;
2112begin
2113 DE.E := ReadByte;
2114end;
2115
2116procedure TCpuZ80.RRA;
2117var
2118 NewCarry: Boolean;
2119begin
2120 NewCarry := (AF.A and 1) > 0;
2121 AF.A := (AF.A shr 1) or ($80 * Byte(Carry));
2122 Carry := NewCarry;
2123end;
2124
2125procedure TCpuZ80.JR_NZ_D;
2126begin
2127 Jr(not Zero)
2128end;
2129
2130procedure TCpuZ80.LD_HL_NN;
2131begin
2132 HL.Value := ReadWord;
2133end;
2134
2135procedure TCpuZ80.LD_NN_Indirect_HL;
2136begin
2137 DoWriteWord(ReadWord, HL.Value);
2138end;
2139
2140procedure TCpuZ80.INC_HL;
2141begin
2142 IncWord(HL.Value);
2143end;
2144
2145procedure TCpuZ80.INC_H;
2146begin
2147 IncByte(HL.H);
2148end;
2149
2150procedure TCpuZ80.DEC_H;
2151begin
2152 DecByte(HL.H);
2153end;
2154
2155procedure TCpuZ80.LD_H_N;
2156begin
2157 HL.H := ReadByte;
2158end;
2159
2160procedure TCpuZ80.DAA;
2161begin
2162 NotImplemented;
2163end;
2164
2165procedure TCpuZ80.JR_Z_D;
2166begin
2167 Jr(Zero);
2168end;
2169
2170procedure TCpuZ80.ADD_HL_HL;
2171begin
2172 AddWord(Hl.Value, HL.Value);
2173end;
2174
2175procedure TCpuZ80.LD_HL_NN_Indirect;
2176begin
2177 HL.Value := DoReadWord(ReadWord);
2178end;
2179
2180procedure TCpuZ80.DEC_HL;
2181begin
2182 DecWord(HL.Value);
2183end;
2184
2185procedure TCpuZ80.INC_L;
2186begin
2187 IncByte(HL.L);
2188end;
2189
2190procedure TCpuZ80.DEC_L;
2191begin
2192 DecByte(HL.L);
2193end;
2194
2195procedure TCpuZ80.LD_L_N;
2196begin
2197 HL.L := ReadByte;
2198end;
2199
2200procedure TCpuZ80.CPL;
2201begin
2202 AF.A := AF.A xor $ff;
2203end;
2204
2205procedure TCpuZ80.JR_NC_D;
2206begin
2207 Jr(not Carry);
2208end;
2209
2210procedure TCpuZ80.LD_SP_NN;
2211begin
2212 SP := ReadWord;
2213end;
2214
2215procedure TCpuZ80.LD_NN_Indirect_A;
2216begin
2217 DoWrite(ReadWord, AF.A);
2218end;
2219
2220procedure TCpuZ80.INC_SP;
2221begin
2222 IncWord(SP);
2223end;
2224
2225procedure TCpuZ80.INC_HL_Indirect;
2226var
2227 Temp: Byte;
2228begin
2229 Temp := DoRead(HL.Value);
2230 IncByte(Temp);
2231 DoWrite(HL.Value, Temp);
2232end;
2233
2234procedure TCpuZ80.DEC_HL_Indirect;
2235var
2236 Temp: Byte;
2237begin
2238 Temp := DoRead(HL.Value);
2239 DecByte(Temp);
2240 DoWrite(HL.Value, Temp);
2241end;
2242
2243procedure TCpuZ80.LD_HL_Indirect_N;
2244begin
2245 DoWrite(HL.Value, ReadByte);
2246end;
2247
2248procedure TCpuZ80.SCF;
2249begin
2250 Carry := True;
2251end;
2252
2253procedure TCpuZ80.JR_C_D;
2254begin
2255 Jr(Carry);
2256end;
2257
2258procedure TCpuZ80.ADD_HL_SP;
2259begin
2260 AddWord(HL.Value, SP);
2261end;
2262
2263procedure TCpuZ80.LD_A_NN_Indirect;
2264begin
2265 AF.A := DoRead(ReadWord);
2266end;
2267
2268procedure TCpuZ80.DEC_SP;
2269begin
2270 DecWord(SP);
2271end;
2272
2273procedure TCpuZ80.INC_A;
2274begin
2275 IncByte(AF.A);
2276end;
2277
2278procedure TCpuZ80.DEC_A;
2279begin
2280 DecByte(AF.A);
2281end;
2282
2283procedure TCpuZ80.LD_A_N;
2284begin
2285 AF.A := ReadByte;
2286end;
2287
2288procedure TCpuZ80.CCF;
2289begin
2290 Carry := not Carry;
2291end;
2292
2293procedure TCpuZ80.LD_B_B;
2294begin
2295 BC.B := BC.B;
2296end;
2297
2298procedure TCpuZ80.LD_B_C;
2299begin
2300 BC.B := BC.C;
2301end;
2302
2303procedure TCpuZ80.LD_B_D;
2304begin
2305 BC.B := DE.D;
2306end;
2307
2308procedure TCpuZ80.LD_B_E;
2309begin
2310 BC.B := DE.E;
2311end;
2312
2313procedure TCpuZ80.LD_B_H;
2314begin
2315 BC.B := HL.H;
2316end;
2317
2318procedure TCpuZ80.LD_B_L;
2319begin
2320 BC.B := HL.L;
2321end;
2322
2323procedure TCpuZ80.LD_B_HL_Indirect;
2324begin
2325 BC.B := DoRead(HL.Value);
2326end;
2327
2328procedure TCpuZ80.LD_B_A;
2329begin
2330 BC.B := AF.A;
2331end;
2332
2333procedure TCpuZ80.LD_C_B;
2334begin
2335 BC.C := BC.B;
2336end;
2337
2338procedure TCpuZ80.LD_C_C;
2339begin
2340 BC.C := BC.C;
2341end;
2342
2343procedure TCpuZ80.LD_C_D;
2344begin
2345 BC.C := DE.D;
2346end;
2347
2348procedure TCpuZ80.LD_C_E;
2349begin
2350 BC.C := DE.E;
2351end;
2352
2353procedure TCpuZ80.LD_C_H;
2354begin
2355 BC.C := HL.H;
2356end;
2357
2358procedure TCpuZ80.LD_C_L;
2359begin
2360 BC.C := HL.L;
2361end;
2362
2363procedure TCpuZ80.LD_C_HL_Indirect;
2364begin
2365 BC.C := DoRead(HL.Value);
2366end;
2367
2368procedure TCpuZ80.LD_C_A;
2369begin
2370 BC.C := AF.A;
2371end;
2372
2373procedure TCpuZ80.LD_D_B;
2374begin
2375 DE.D := BC.B;
2376end;
2377
2378procedure TCpuZ80.LD_D_C;
2379begin
2380 DE.D := BC.C;
2381end;
2382
2383procedure TCpuZ80.LD_D_D;
2384begin
2385 DE.D := DE.D;
2386end;
2387
2388procedure TCpuZ80.LD_D_E;
2389begin
2390 DE.D := DE.E;
2391end;
2392
2393procedure TCpuZ80.LD_D_H;
2394begin
2395 DE.D := HL.H;
2396end;
2397
2398procedure TCpuZ80.LD_D_L;
2399begin
2400 DE.D := HL.L;
2401end;
2402
2403procedure TCpuZ80.LD_D_HL_Indirect;
2404begin
2405 DE.D := DoRead(HL.Value);
2406end;
2407
2408procedure TCpuZ80.LD_D_A;
2409begin
2410 DE.D := AF.A;
2411end;
2412
2413procedure TCpuZ80.LD_E_B;
2414begin
2415 DE.E := BC.B;
2416end;
2417
2418procedure TCpuZ80.LD_E_C;
2419begin
2420 DE.E := BC.C;
2421end;
2422
2423procedure TCpuZ80.LD_E_D;
2424begin
2425 DE.E := DE.D;
2426end;
2427
2428procedure TCpuZ80.LD_E_E;
2429begin
2430 DE.E := DE.E;
2431end;
2432
2433procedure TCpuZ80.LD_E_H;
2434begin
2435 DE.E := HL.H;
2436end;
2437
2438procedure TCpuZ80.LD_E_L;
2439begin
2440 DE.E := HL.L;
2441end;
2442
2443procedure TCpuZ80.LD_E_HL_Indirect;
2444begin
2445 DE.E := DoRead(HL.Value);
2446end;
2447
2448procedure TCpuZ80.LD_E_A;
2449begin
2450 DE.E := AF.A;
2451end;
2452
2453procedure TCpuZ80.LD_H_B;
2454begin
2455 HL.H := BC.B;
2456end;
2457
2458procedure TCpuZ80.LD_H_C;
2459begin
2460 HL.H := BC.C;
2461end;
2462
2463procedure TCpuZ80.LD_H_D;
2464begin
2465 HL.H := DE.D;
2466end;
2467
2468procedure TCpuZ80.LD_H_E;
2469begin
2470 HL.H := DE.E;
2471end;
2472
2473procedure TCpuZ80.LD_H_H;
2474begin
2475 HL.H := HL.H;
2476end;
2477
2478procedure TCpuZ80.LD_H_L;
2479begin
2480 HL.H := HL.L;
2481end;
2482
2483procedure TCpuZ80.LD_H_HL_Indirect;
2484begin
2485 HL.H := DoRead(HL.Value);
2486end;
2487
2488procedure TCpuZ80.LD_H_A;
2489begin
2490 HL.H := AF.A;
2491end;
2492
2493procedure TCpuZ80.LD_L_B;
2494begin
2495 HL.L := BC.B;
2496end;
2497
2498procedure TCpuZ80.LD_L_C;
2499begin
2500 HL.L := BC.C;
2501end;
2502
2503procedure TCpuZ80.LD_L_D;
2504begin
2505 HL.L := DE.D;
2506end;
2507
2508procedure TCpuZ80.LD_L_E;
2509begin
2510 HL.L := DE.E;
2511end;
2512
2513procedure TCpuZ80.LD_L_H;
2514begin
2515 HL.L := HL.H;
2516end;
2517
2518procedure TCpuZ80.LD_L_L;
2519begin
2520 HL.L := HL.L;
2521end;
2522
2523procedure TCpuZ80.LD_L_HL_Indirect;
2524begin
2525 HL.L := DoRead(HL.Value);
2526end;
2527
2528procedure TCpuZ80.LD_L_A;
2529begin
2530 HL.L := AF.A;
2531end;
2532
2533procedure TCpuZ80.LD_HL_Indirect_B;
2534begin
2535 DoWrite(HL.Value, BC.B);
2536end;
2537
2538procedure TCpuZ80.LD_HL_Indirect_C;
2539begin
2540 DoWrite(HL.Value, BC.C);
2541end;
2542
2543procedure TCpuZ80.LD_HL_Indirect_D;
2544begin
2545 DoWrite(HL.Value, DE.D);
2546end;
2547
2548procedure TCpuZ80.LD_HL_Indirect_E;
2549begin
2550 DoWrite(HL.Value, DE.E);
2551end;
2552
2553procedure TCpuZ80.LD_HL_Indirect_H;
2554begin
2555 DoWrite(HL.Value, HL.H);
2556end;
2557
2558procedure TCpuZ80.LD_HL_Indirect_L;
2559begin
2560 DoWrite(HL.Value, HL.L);
2561end;
2562
2563procedure TCpuZ80.HALT;
2564begin
2565 FThread.Terminate;
2566end;
2567
2568procedure TCpuZ80.LD_HL_Indirect_A;
2569begin
2570 DoWrite(HL.Value, AF.A);
2571end;
2572
2573procedure TCpuZ80.LD_A_B;
2574begin
2575 AF.A := BC.B;
2576end;
2577
2578procedure TCpuZ80.LD_A_C;
2579begin
2580 AF.A := BC.C;
2581end;
2582
2583procedure TCpuZ80.LD_A_D;
2584begin
2585 AF.A := DE.D;
2586end;
2587
2588procedure TCpuZ80.LD_A_E;
2589begin
2590 AF.A := DE.E;
2591end;
2592
2593procedure TCpuZ80.LD_A_H;
2594begin
2595 AF.A := HL.H;
2596end;
2597
2598procedure TCpuZ80.LD_A_L;
2599begin
2600 AF.A := HL.L;
2601end;
2602
2603procedure TCpuZ80.LD_A_HL_Indirect;
2604begin
2605 AF.A := DoRead(HL.Value);
2606end;
2607
2608procedure TCpuZ80.LD_A_A;
2609begin
2610 AF.A := AF.A;
2611end;
2612
2613procedure TCpuZ80.ADD_A_B;
2614begin
2615 AddByte(AF.A, BC.B);
2616end;
2617
2618procedure TCpuZ80.ADD_A_C;
2619begin
2620 AddByte(AF.A, BC.C);
2621end;
2622
2623procedure TCpuZ80.ADD_A_D;
2624begin
2625 AddByte(AF.A, DE.D);
2626end;
2627
2628procedure TCpuZ80.ADD_A_E;
2629begin
2630 AddByte(AF.A, DE.E);
2631end;
2632
2633procedure TCpuZ80.ADD_A_H;
2634begin
2635 AddByte(AF.A, HL.H);
2636end;
2637
2638procedure TCpuZ80.ADD_A_L;
2639begin
2640 AddByte(AF.A, HL.L);
2641end;
2642
2643procedure TCpuZ80.ADD_A_HL_Indirect;
2644begin
2645 AddByte(AF.A, DoRead(HL.Value));
2646end;
2647
2648procedure TCpuZ80.ADD_A_A;
2649begin
2650 AddByte(AF.A, AF.A);
2651end;
2652
2653procedure TCpuZ80.ADC_A_B;
2654begin
2655 AdcByte(AF.A, BC.B);
2656end;
2657
2658procedure TCpuZ80.ADC_A_C;
2659begin
2660 AdcByte(AF.A, BC.C);
2661end;
2662
2663procedure TCpuZ80.ADC_A_D;
2664begin
2665 AdcByte(AF.A, DE.D);
2666end;
2667
2668procedure TCpuZ80.ADC_A_E;
2669begin
2670 AdcByte(AF.A, DE.E);
2671end;
2672
2673procedure TCpuZ80.ADC_A_H;
2674begin
2675 AdcByte(AF.A, HL.H);
2676end;
2677
2678procedure TCpuZ80.ADC_A_L;
2679begin
2680 AdcByte(AF.A, HL.L);
2681end;
2682
2683procedure TCpuZ80.ADC_A_HL_Indirect;
2684begin
2685 AdcByte(AF.A, DoRead(HL.Value));
2686end;
2687
2688procedure TCpuZ80.ADC_A_A;
2689begin
2690 AdcByte(AF.A, AF.A);
2691end;
2692
2693procedure TCpuZ80.SUB_B;
2694begin
2695 SubByte(AF.A, BC.B);
2696end;
2697
2698procedure TCpuZ80.SUB_C;
2699begin
2700 SubByte(AF.A, BC.C);
2701end;
2702
2703procedure TCpuZ80.SUB_D;
2704begin
2705 SubByte(AF.A, DE.D);
2706end;
2707
2708procedure TCpuZ80.SUB_E;
2709begin
2710 SubByte(AF.A, DE.E);
2711end;
2712
2713procedure TCpuZ80.SUB_H;
2714begin
2715 SubByte(AF.A, HL.H);
2716end;
2717
2718procedure TCpuZ80.SUB_L;
2719begin
2720 SubByte(AF.A, HL.L);
2721end;
2722
2723procedure TCpuZ80.SUB_HL_Indirect;
2724begin
2725 SubByte(AF.A, DoRead(HL.Value));
2726end;
2727
2728procedure TCpuZ80.SUB_A;
2729begin
2730 SubByte(AF.A, AF.A);
2731end;
2732
2733procedure TCpuZ80.SBC_A_B;
2734begin
2735 SbcByte(AF.A, BC.B);
2736end;
2737
2738procedure TCpuZ80.SBC_A_C;
2739begin
2740 SbcByte(AF.A, BC.C);
2741end;
2742
2743procedure TCpuZ80.SBC_A_D;
2744begin
2745 SbcByte(AF.A, DE.D);
2746end;
2747
2748procedure TCpuZ80.SBC_A_E;
2749begin
2750 SbcByte(AF.A, DE.E);
2751end;
2752
2753procedure TCpuZ80.SBC_A_H;
2754begin
2755 SbcByte(AF.A, HL.H);
2756end;
2757
2758procedure TCpuZ80.SBC_A_L;
2759begin
2760 SbcByte(AF.A, HL.L);
2761end;
2762
2763procedure TCpuZ80.SBC_A_HL_Indirect;
2764begin
2765 SbcByte(AF.A, DoRead(HL.Value));
2766end;
2767
2768procedure TCpuZ80.SBC_A_A;
2769begin
2770 SbcByte(AF.A, AF.A);
2771end;
2772
2773procedure TCpuZ80.AND_B;
2774begin
2775 AndByte(AF.A, BC.B);
2776end;
2777
2778procedure TCpuZ80.AND_C;
2779begin
2780 AndByte(AF.A, BC.C);
2781end;
2782
2783procedure TCpuZ80.AND_D;
2784begin
2785 AndByte(AF.A, DE.D);
2786end;
2787
2788procedure TCpuZ80.AND_E;
2789begin
2790 AndByte(AF.A, DE.E);
2791end;
2792
2793procedure TCpuZ80.AND_H;
2794begin
2795 AndByte(AF.A, HL.H);
2796end;
2797
2798procedure TCpuZ80.AND_L;
2799begin
2800 AndByte(AF.A, HL.L);
2801end;
2802
2803procedure TCpuZ80.AND_HL_Indirect;
2804begin
2805 AndByte(AF.A, DoRead(HL.Value));
2806end;
2807
2808procedure TCpuZ80.AND_A;
2809begin
2810 AndByte(AF.A, AF.A);
2811end;
2812
2813procedure TCpuZ80.XOR_B;
2814begin
2815 XorByte(AF.A, BC.B);
2816end;
2817
2818procedure TCpuZ80.XOR_C;
2819begin
2820 XorByte(AF.A, BC.C);
2821end;
2822
2823procedure TCpuZ80.XOR_D;
2824begin
2825 XorByte(AF.A, DE.D);
2826end;
2827
2828procedure TCpuZ80.XOR_E;
2829begin
2830 XorByte(AF.A, DE.E);
2831end;
2832
2833procedure TCpuZ80.XOR_H;
2834begin
2835 XorByte(AF.A, HL.H);
2836end;
2837
2838procedure TCpuZ80.XOR_L;
2839begin
2840 XorByte(AF.A, HL.L);
2841end;
2842
2843procedure TCpuZ80.XOR_HL_Indirect;
2844begin
2845 XorByte(AF.A, DoRead(HL.Value));
2846end;
2847
2848procedure TCpuZ80.XOR_A;
2849begin
2850 XorByte(AF.A, AF.A);
2851end;
2852
2853procedure TCpuZ80.OR_B;
2854begin
2855 OrByte(AF.A, BC.B);
2856end;
2857
2858procedure TCpuZ80.OR_C;
2859begin
2860 OrByte(AF.A, BC.C);
2861end;
2862
2863procedure TCpuZ80.OR_D;
2864begin
2865 OrByte(AF.A, DE.D);
2866end;
2867
2868procedure TCpuZ80.OR_E;
2869begin
2870 OrByte(AF.A, DE.E);
2871end;
2872
2873procedure TCpuZ80.OR_H;
2874begin
2875 OrByte(AF.A, HL.H);
2876end;
2877
2878procedure TCpuZ80.OR_L;
2879begin
2880 OrByte(AF.A, HL.L);
2881end;
2882
2883procedure TCpuZ80.OR_HL_Indirect;
2884begin
2885 OrByte(AF.A, DoRead(HL.Value));
2886end;
2887
2888procedure TCpuZ80.OR_A;
2889begin
2890 OrByte(AF.A, AF.A);
2891end;
2892
2893procedure TCpuZ80.CP_B;
2894begin
2895 CpByte(BC.B);
2896end;
2897
2898procedure TCpuZ80.CP_C;
2899begin
2900 CpByte(BC.C);
2901end;
2902
2903procedure TCpuZ80.CP_D;
2904begin
2905 CpByte(DE.D);
2906end;
2907
2908procedure TCpuZ80.CP_E;
2909begin
2910 CpByte(DE.E);
2911end;
2912
2913procedure TCpuZ80.CP_H;
2914begin
2915 CpByte(HL.H);
2916end;
2917
2918procedure TCpuZ80.CP_L;
2919begin
2920 CpByte(HL.L);
2921end;
2922
2923procedure TCpuZ80.CP_HL_Indirect;
2924begin
2925 CpByte(DoRead(HL.Value));
2926end;
2927
2928procedure TCpuZ80.CP_A;
2929begin
2930 CpByte(AF.A);
2931end;
2932
2933procedure TCpuZ80.RET_NZ;
2934begin
2935 RetCond(not Zero);
2936end;
2937
2938procedure TCpuZ80.POP_BC;
2939begin
2940 BC.Value := PopWord;
2941end;
2942
2943procedure TCpuZ80.JP_NZ_NN;
2944begin
2945 Jp(not Zero);
2946end;
2947
2948procedure TCpuZ80.JP_NN;
2949begin
2950 PC := ReadWord;
2951end;
2952
2953procedure TCpuZ80.CALL_NZ_NN;
2954begin
2955 CallCond(ReadWord, not Zero);
2956end;
2957
2958procedure TCpuZ80.PUSH_BC;
2959begin
2960 PushWord(BC.Value)
2961end;
2962
2963procedure TCpuZ80.ADD_A_N;
2964begin
2965 AddByte(AF.A, ReadByte);
2966end;
2967
2968procedure TCpuZ80.RST_00H;
2969begin
2970 Call($00);
2971end;
2972
2973procedure TCpuZ80.RET_Z;
2974begin
2975 RetCond(Zero);
2976end;
2977
2978procedure TCpuZ80.RET;
2979begin
2980 RetCond(True);
2981end;
2982
2983procedure TCpuZ80.JP_Z_NN;
2984begin
2985 Jp(Zero);
2986end;
2987
2988procedure TCpuZ80.CALL_Z_NN;
2989begin
2990 CallCond(ReadWord, Zero);
2991end;
2992
2993procedure TCpuZ80.CALL_NN;
2994begin
2995 Call(ReadWord);
2996end;
2997
2998procedure TCpuZ80.ADC_A_N;
2999begin
3000 AdcByte(AF.A, ReadByte);
3001end;
3002
3003procedure TCpuZ80.RST_08H;
3004begin
3005 Call($08);
3006end;
3007
3008procedure TCpuZ80.RET_NC;
3009begin
3010 RetCond(not Carry);
3011end;
3012
3013procedure TCpuZ80.POP_DE;
3014begin
3015 DE.Value := PopWord;
3016end;
3017
3018procedure TCpuZ80.JP_NC_NN;
3019begin
3020 Jp(not Carry);
3021end;
3022
3023procedure TCpuZ80.OUT_N_Indirect_A;
3024begin
3025 DoOutput(ReadByte, AF.A);
3026end;
3027
3028procedure TCpuZ80.CALL_NC_NN;
3029begin
3030 CallCond(ReadWord, not Carry);
3031end;
3032
3033procedure TCpuZ80.PUSH_DE;
3034begin
3035 PushWord(DE.Value);
3036end;
3037
3038procedure TCpuZ80.SUB_N;
3039begin
3040 SubByte(AF.A, ReadByte);
3041end;
3042
3043procedure TCpuZ80.RST_10H;
3044begin
3045 Call($10);
3046end;
3047
3048procedure TCpuZ80.RET_C;
3049begin
3050 RetCond(Carry);
3051end;
3052
3053procedure TCpuZ80.EXX;
3054var
3055 Temp: Word;
3056begin
3057 Temp := BC.Value;
3058 BC.Value := BC2.Value;
3059 BC2.Value := Temp;
3060 Temp := DE.Value;
3061 DE2.Value := DE2.Value;
3062 DE2.Value := Temp;
3063 Temp := HL.Value;
3064 HL.Value := HL2.Value;
3065 HL2.Value := Temp;
3066end;
3067
3068procedure TCpuZ80.JP_C_NN;
3069begin
3070 Jp(Carry);
3071end;
3072
3073procedure TCpuZ80.IN_A_N_Indirect;
3074begin
3075 AF.A := DoInput((AF.A shl 8) or ReadByte);
3076end;
3077
3078procedure TCpuZ80.CALL_C_NN;
3079begin
3080 CallCond(ReadWord, Carry);
3081end;
3082
3083procedure TCpuZ80.SBC_A_N;
3084begin
3085 SbcByte(AF.A, ReadByte);
3086end;
3087
3088procedure TCpuZ80.RST_18H;
3089begin
3090 Call($18);
3091end;
3092
3093procedure TCpuZ80.RET_PO;
3094begin
3095 RetCond(not ParityOverflow);
3096end;
3097
3098procedure TCpuZ80.POP_HL;
3099begin
3100 HL.Value := PopWord;
3101end;
3102
3103procedure TCpuZ80.JP_PO_NN;
3104begin
3105 Jp(not ParityOverflow);
3106end;
3107
3108procedure TCpuZ80.EX_SP_Indirect_HL;
3109var
3110 Temp: Word;
3111begin
3112 Temp := HL.Value;
3113 HL.Value := DoReadWord(SP);
3114 DoWriteWord(SP, Temp);
3115end;
3116
3117procedure TCpuZ80.CALL_PO_NN;
3118begin
3119 CallCond(ReadWord, not ParityOverflow);
3120end;
3121
3122procedure TCpuZ80.PUSH_HL;
3123begin
3124 PushWord(HL.Value);
3125end;
3126
3127procedure TCpuZ80.AND_N;
3128begin
3129 AndByte(AF.A, ReadByte);
3130end;
3131
3132procedure TCpuZ80.RST_20H;
3133begin
3134 Call($20);
3135end;
3136
3137procedure TCpuZ80.RET_PE;
3138begin
3139 RetCond(ParityOverflow);
3140end;
3141
3142procedure TCpuZ80.JP_HL_Indirect;
3143begin
3144 PC := DoRead(HL.Value);
3145end;
3146
3147procedure TCpuZ80.JP_PE_NN;
3148begin
3149 Jp(ParityOverflow);
3150end;
3151
3152procedure TCpuZ80.EX_DE_HL;
3153var
3154 TempWord: Word;
3155begin
3156 TempWord := DE.Value;
3157 DE.Value := HL.Value;
3158 HL.Value := TempWord;
3159end;
3160
3161procedure TCpuZ80.CALL_PE_NN;
3162begin
3163 CallCond(ReadWord, ParityOverflow);
3164end;
3165
3166procedure TCpuZ80.XOR_N;
3167begin
3168 XorByte(AF.A, ReadByte);
3169end;
3170
3171procedure TCpuZ80.RST_28H;
3172begin
3173 Call($28);
3174end;
3175
3176procedure TCpuZ80.RET_P;
3177begin
3178 RetCond(not SignNegative);
3179end;
3180
3181procedure TCpuZ80.POP_AF;
3182begin
3183 AF.Value := PopWord;
3184end;
3185
3186procedure TCpuZ80.JP_P_NN;
3187begin
3188 Jp(not SignNegative);
3189end;
3190
3191procedure TCpuZ80.DI;
3192begin
3193 InterruptEnabled := False;
3194end;
3195
3196procedure TCpuZ80.CALL_P_NN;
3197begin
3198 CallCond(ReadWord, not SignNegative);
3199end;
3200
3201procedure TCpuZ80.PUSH_AF;
3202begin
3203 PushWord(AF.Value);
3204end;
3205
3206procedure TCpuZ80.OR_N;
3207begin
3208 OrByte(AF.A, ReadByte);
3209end;
3210
3211procedure TCpuZ80.RST_30H;
3212begin
3213 Call($30);
3214end;
3215
3216procedure TCpuZ80.RET_M;
3217begin
3218 RetCond(SignNegative);
3219end;
3220
3221procedure TCpuZ80.LD_SP_HL;
3222begin
3223 SP := HL.Value;
3224end;
3225
3226procedure TCpuZ80.JP_M_NN;
3227begin
3228 Jp(SignNegative);
3229end;
3230
3231procedure TCpuZ80.EI;
3232begin
3233 InterruptEnabled := True;
3234end;
3235
3236procedure TCpuZ80.CALL_M_NN;
3237begin
3238 CallCond(ReadWord, SignNegative);
3239end;
3240
3241procedure TCpuZ80.CP_N;
3242begin
3243 CpByte(ReadByte);
3244end;
3245
3246procedure TCpuZ80.RST_38H;
3247begin
3248 Call($38);
3249end;
3250
3251procedure TCpuZ80.IN_B_C_Indirect;
3252begin
3253 BC.B := DoInput(BC.Value);
3254end;
3255
3256procedure TCpuZ80.OUT_C_Indirect_B;
3257begin
3258 BC.C := DoInput(BC.Value);
3259end;
3260
3261procedure TCpuZ80.SBC_HL_BC;
3262begin
3263 SbcWord(HL.Value, BC.Value);
3264end;
3265
3266procedure TCpuZ80.LD_NN_Indirect_BC;
3267begin
3268 DoWrite(ReadWord, BC.Value);
3269end;
3270
3271procedure TCpuZ80.NEG;
3272begin
3273 ParityOverflow := AF.A = $80;
3274 Carry := AF.A <> $0;
3275 AF.A := AF.A xor $ff;
3276 IncByte(AF.A);
3277 SignNegative := (AF.A and $80) <> 1;
3278 Zero := AF.A = 0;
3279end;
3280
3281procedure TCpuZ80.RETN;
3282begin
3283 InterruptEnabled := False;
3284 PC := PopWord;
3285end;
3286
3287procedure TCpuZ80.IM_0;
3288begin
3289 InterruptMode := 0;
3290end;
3291
3292procedure TCpuZ80.LD_I_A;
3293begin
3294 RegI := AF.A;
3295end;
3296
3297procedure TCpuZ80.IN_C_C_Indirect;
3298begin
3299 BC.C := DoInput(BC.Value);
3300end;
3301
3302procedure TCpuZ80.OUT_C_Indirect_C;
3303begin
3304 DoOutput(BC.Value, BC.C);
3305end;
3306
3307procedure TCpuZ80.ADC_HL_BC;
3308begin
3309 AdcWord(HL.Value, BC.Value);
3310end;
3311
3312procedure TCpuZ80.LD_BC_NN_Indirect;
3313begin
3314 BC.Value := DoReadWord(ReadWord);
3315end;
3316
3317procedure TCpuZ80.RETI;
3318begin
3319 InterruptEnabled := False;
3320 PC := PopWord;
3321end;
3322
3323procedure TCpuZ80.LD_R_A;
3324begin
3325 RegR := AF.A;
3326end;
3327
3328procedure TCpuZ80.IN_D_C_Indirect;
3329begin
3330 DE.D := DoInput(BC.Value);
3331end;
3332
3333procedure TCpuZ80.OUT_C_Indirect_D;
3334begin
3335 DoOutput(BC.Value, DE.D);
3336end;
3337
3338procedure TCpuZ80.SBC_HL_DE;
3339begin
3340 SbcWord(HL.Value, DE.Value);
3341end;
3342
3343procedure TCpuZ80.LD_NN_Indirect_DE;
3344begin
3345 DoWriteWord(ReadWord, DE.Value);
3346end;
3347
3348procedure TCpuZ80.IM_1;
3349begin
3350 InterruptMode := 1;
3351end;
3352
3353procedure TCpuZ80.LD_A_I;
3354begin
3355 AF.A := RegI;
3356end;
3357
3358procedure TCpuZ80.IN_E_C_Indirect;
3359begin
3360 DE.E := DoInput(BC.Value);
3361end;
3362
3363procedure TCpuZ80.OUT_C_Indirect_E;
3364begin
3365 DoOutput(BC.Value, DE.E);
3366end;
3367
3368procedure TCpuZ80.ADC_HL_DE;
3369begin
3370 AdcWord(HL.Value, DE.Value);
3371end;
3372
3373procedure TCpuZ80.LD_DE_NN_Indirect;
3374begin
3375 DE.Value := DoReadWord(ReadWord);
3376end;
3377
3378procedure TCpuZ80.IM_2;
3379begin
3380 InterruptMode := 2;
3381end;
3382
3383procedure TCpuZ80.LD_A_R;
3384begin
3385 AF.A := RegR;
3386end;
3387
3388procedure TCpuZ80.IN_H_C_Indirect;
3389begin
3390 HL.H := DoInput(BC.Value);
3391end;
3392
3393procedure TCpuZ80.OUT_C_Indirect_H;
3394begin
3395 DoOutput(BC.Value, HL.H);
3396end;
3397
3398procedure TCpuZ80.SBC_HL_HL;
3399begin
3400 SbcWord(HL.Value, HL.Value);
3401end;
3402
3403procedure TCpuZ80.RRD;
3404begin
3405 NotImplemented;
3406end;
3407
3408procedure TCpuZ80.IN_L_C_Indirect;
3409begin
3410 HL.L := DoInput(BC.Value);
3411end;
3412
3413procedure TCpuZ80.OUT_C_Indirect_L;
3414begin
3415 DoOutput(BC.Value, HL.L);
3416end;
3417
3418procedure TCpuZ80.ADC_HL_HL;
3419begin
3420 AdcWord(HL.Value, HL.Value);
3421end;
3422
3423procedure TCpuZ80.RLD;
3424begin
3425 NotImplemented;
3426end;
3427
3428procedure TCpuZ80.SBC_HL_SP;
3429begin
3430 SbcWord(HL.Value, SP);
3431end;
3432
3433procedure TCpuZ80.LD_NN_Indirect_SP;
3434begin
3435 DoWriteWord(ReadWord, SP);
3436end;
3437
3438procedure TCpuZ80.IN_A_C_Indirect;
3439begin
3440 AF.A := DoInput(BC.Value);
3441end;
3442
3443procedure TCpuZ80.OUT_C_Indirect_A;
3444begin
3445 DoOutput(BC.Value, AF.A);
3446end;
3447
3448procedure TCpuZ80.ADC_HL_SP;
3449begin
3450 AdcWord(Hl.Value, SP);
3451end;
3452
3453procedure TCpuZ80.LD_SP_NN_Indirect;
3454begin
3455 SP := DoReadWord(ReadWord);
3456end;
3457
3458procedure TCpuZ80.LDI;
3459begin
3460 DoWrite(DE.Value, DoRead(HL.Value));
3461 IncWord(HL.Value);
3462 IncWord(DE.Value);
3463 DecWord(BC.Value);
3464end;
3465
3466procedure TCpuZ80.CPI;
3467begin
3468 CpByte(DoRead(HL.Value));
3469 IncWord(HL.Value);
3470 DecWord(BC.Value);
3471end;
3472
3473procedure TCpuZ80.INI;
3474begin
3475 DoWrite(HL.Value, DoInput(BC.Value));
3476 DecByte(BC.B);
3477 IncWord(HL.Value);
3478end;
3479
3480procedure TCpuZ80.OUTI;
3481begin
3482 DoOutput(BC.Value, DoRead(HL.Value));
3483 DecByte(BC.B);
3484 IncWord(HL.Value);
3485end;
3486
3487procedure TCpuZ80.LDD;
3488begin
3489 DoWrite(DE.Value, DoRead(HL.Value));
3490 DecWord(HL.Value);
3491 DecWord(DE.Value);
3492 DecWord(BC.Value);
3493end;
3494
3495procedure TCpuZ80.CPD;
3496begin
3497 CpByte(DoRead(HL.Value));
3498 DecWord(HL.Value);
3499 DecWord(BC.Value);
3500end;
3501
3502procedure TCpuZ80.IND;
3503begin
3504 DoWrite(HL.Value, DoInput(BC.Value));
3505 DecByte(BC.B);
3506 DecWord(HL.Value);
3507end;
3508
3509procedure TCpuZ80.OUTD;
3510begin
3511 DoOutput(BC.Value, DoRead(HL.Value));
3512 DecByte(BC.B);
3513 DecWord(HL.Value);
3514end;
3515
3516procedure TCpuZ80.LDIR;
3517begin
3518 repeat
3519 LDI;
3520 until BC.Value = 0;
3521end;
3522
3523procedure TCpuZ80.CPIR;
3524begin
3525 repeat
3526 CPI;
3527 until (BC.Value = 0) or Zero;
3528end;
3529
3530procedure TCpuZ80.INIR;
3531begin
3532 repeat
3533 INI;
3534 until (BC.B = 0);
3535end;
3536
3537procedure TCpuZ80.OTIR;
3538begin
3539 repeat
3540 OUTI;
3541 until BC.B = 0;
3542end;
3543
3544procedure TCpuZ80.LDDR;
3545begin
3546 repeat
3547 LDD;
3548 until BC.Value = 0;
3549end;
3550
3551procedure TCpuZ80.CPDR;
3552begin
3553 repeat
3554 CPD;
3555 until (BC.Value = 0) or Zero;
3556end;
3557
3558procedure TCpuZ80.INDR;
3559begin
3560 repeat
3561 IND;
3562 until (BC.B = 0);
3563end;
3564
3565procedure TCpuZ80.OTDR;
3566begin
3567 repeat
3568 OUTD;
3569 until BC.B = 0;
3570end;
3571
3572procedure TCpuZ80.RLC_B;
3573begin
3574 RlcByte(BC.B);
3575end;
3576
3577procedure TCpuZ80.RLC_C;
3578begin
3579 RlcByte(BC.C);
3580end;
3581
3582procedure TCpuZ80.RLC_D;
3583begin
3584 RlcByte(DE.D);
3585end;
3586
3587procedure TCpuZ80.RLC_E;
3588begin
3589 RlcByte(DE.E);
3590end;
3591
3592procedure TCpuZ80.RLC_H;
3593begin
3594 RlcByte(HL.H);
3595end;
3596
3597procedure TCpuZ80.RLC_L;
3598begin
3599 RlcByte(HL.L);
3600end;
3601
3602procedure TCpuZ80.RLC_HL_Indirect;
3603var
3604 Temp: Byte;
3605begin
3606 Temp := DoRead(HL.Value);
3607 RlcByte(Temp);
3608 DoWrite(HL.Value, Temp);
3609end;
3610
3611procedure TCpuZ80.RLC_A;
3612begin
3613 RlcByte(AF.A);
3614end;
3615
3616procedure TCpuZ80.RRC_B;
3617begin
3618 RrcByte(BC.B);
3619end;
3620
3621procedure TCpuZ80.RRC_C;
3622begin
3623 RrcByte(BC.C);
3624end;
3625
3626procedure TCpuZ80.RRC_D;
3627begin
3628 RrcByte(DE.D);
3629end;
3630
3631procedure TCpuZ80.RRC_E;
3632begin
3633 RrcByte(DE.E);
3634end;
3635
3636procedure TCpuZ80.RRC_H;
3637begin
3638 RrcByte(HL.H);
3639end;
3640
3641procedure TCpuZ80.RRC_L;
3642begin
3643 RrcByte(HL.L);
3644end;
3645
3646procedure TCpuZ80.RRC_HL_Indirect;
3647var
3648 Temp: Byte;
3649begin
3650 Temp := DoRead(HL.Value);
3651 RrcByte(Temp);
3652 DoWrite(HL.Value, Temp);
3653end;
3654
3655procedure TCpuZ80.RRC_A;
3656begin
3657 RrcByte(AF.A);
3658end;
3659
3660procedure TCpuZ80.RL_B;
3661begin
3662 NotImplemented;
3663end;
3664
3665procedure TCpuZ80.RL_C;
3666begin
3667 NotImplemented;
3668end;
3669
3670procedure TCpuZ80.RL_D;
3671begin
3672 NotImplemented;
3673end;
3674
3675procedure TCpuZ80.RL_E;
3676begin
3677 NotImplemented;
3678end;
3679
3680procedure TCpuZ80.RL_H;
3681begin
3682 NotImplemented;
3683end;
3684
3685procedure TCpuZ80.RL_L;
3686begin
3687 NotImplemented;
3688end;
3689
3690procedure TCpuZ80.RL_HL_Indirect;
3691begin
3692 NotImplemented;
3693end;
3694
3695procedure TCpuZ80.RL_A;
3696begin
3697 NotImplemented;
3698end;
3699
3700procedure TCpuZ80.RR_B;
3701begin
3702 NotImplemented;
3703end;
3704
3705procedure TCpuZ80.RR_C;
3706begin
3707 NotImplemented;
3708end;
3709
3710procedure TCpuZ80.RR_D;
3711begin
3712 NotImplemented;
3713end;
3714
3715procedure TCpuZ80.RR_E;
3716begin
3717 NotImplemented;
3718end;
3719
3720procedure TCpuZ80.RR_H;
3721begin
3722 NotImplemented;
3723end;
3724
3725procedure TCpuZ80.RR_L;
3726begin
3727 NotImplemented;
3728end;
3729
3730procedure TCpuZ80.RR_HL_Indirect;
3731begin
3732 NotImplemented;
3733end;
3734
3735procedure TCpuZ80.RR_A;
3736begin
3737 NotImplemented;
3738end;
3739
3740procedure TCpuZ80.SLA_B;
3741begin
3742 NotImplemented;
3743end;
3744
3745procedure TCpuZ80.SLA_C;
3746begin
3747 NotImplemented;
3748end;
3749
3750procedure TCpuZ80.SLA_D;
3751begin
3752 NotImplemented;
3753end;
3754
3755procedure TCpuZ80.SLA_E;
3756begin
3757 NotImplemented;
3758end;
3759
3760procedure TCpuZ80.SLA_H;
3761begin
3762 NotImplemented;
3763end;
3764
3765procedure TCpuZ80.SLA_L;
3766begin
3767 NotImplemented;
3768end;
3769
3770procedure TCpuZ80.SLA_HL_Indirect;
3771begin
3772 NotImplemented;
3773end;
3774
3775procedure TCpuZ80.SLA_A;
3776begin
3777 NotImplemented;
3778end;
3779
3780procedure TCpuZ80.SRA_B;
3781begin
3782 NotImplemented;
3783end;
3784
3785procedure TCpuZ80.SRA_C;
3786begin
3787 NotImplemented;
3788end;
3789
3790procedure TCpuZ80.SRA_D;
3791begin
3792 NotImplemented;
3793end;
3794
3795procedure TCpuZ80.SRA_E;
3796begin
3797 NotImplemented;
3798end;
3799
3800procedure TCpuZ80.SRA_H;
3801begin
3802 NotImplemented;
3803end;
3804
3805procedure TCpuZ80.SRA_L;
3806begin
3807 NotImplemented;
3808end;
3809
3810procedure TCpuZ80.SRA_HL_Indirect;
3811begin
3812 NotImplemented;
3813end;
3814
3815procedure TCpuZ80.SRA_A;
3816begin
3817 NotImplemented;
3818end;
3819
3820procedure TCpuZ80.SRL_B;
3821begin
3822 NotImplemented;
3823end;
3824
3825procedure TCpuZ80.SRL_C;
3826begin
3827 NotImplemented;
3828end;
3829
3830procedure TCpuZ80.SRL_D;
3831begin
3832 NotImplemented;
3833end;
3834
3835procedure TCpuZ80.SRL_E;
3836begin
3837 NotImplemented;
3838end;
3839
3840procedure TCpuZ80.SRL_H;
3841begin
3842 NotImplemented;
3843end;
3844
3845procedure TCpuZ80.SRL_L;
3846begin
3847 NotImplemented;
3848end;
3849
3850procedure TCpuZ80.SRL_HL_Indirect;
3851begin
3852 NotImplemented;
3853end;
3854
3855procedure TCpuZ80.SRL_A;
3856begin
3857 NotImplemented;
3858end;
3859
3860procedure TCpuZ80.BIT_0_B;
3861begin
3862 NotImplemented;
3863end;
3864
3865procedure TCpuZ80.BIT_0_C;
3866begin
3867 NotImplemented;
3868end;
3869
3870procedure TCpuZ80.BIT_0_D;
3871begin
3872 NotImplemented;
3873end;
3874
3875procedure TCpuZ80.BIT_0_E;
3876begin
3877 NotImplemented;
3878end;
3879
3880procedure TCpuZ80.BIT_0_H;
3881begin
3882 NotImplemented;
3883end;
3884
3885procedure TCpuZ80.BIT_0_L;
3886begin
3887 NotImplemented;
3888end;
3889
3890procedure TCpuZ80.BIT_0_HL_Indirect;
3891begin
3892 NotImplemented;
3893end;
3894
3895procedure TCpuZ80.BIT_0_A;
3896begin
3897 NotImplemented;
3898end;
3899
3900procedure TCpuZ80.BIT_1_B;
3901begin
3902 NotImplemented;
3903end;
3904
3905procedure TCpuZ80.BIT_1_C;
3906begin
3907 NotImplemented;
3908end;
3909
3910procedure TCpuZ80.BIT_1_D;
3911begin
3912 NotImplemented;
3913end;
3914
3915procedure TCpuZ80.BIT_1_E;
3916begin
3917 NotImplemented;
3918end;
3919
3920procedure TCpuZ80.BIT_1_H;
3921begin
3922 NotImplemented;
3923end;
3924
3925procedure TCpuZ80.BIT_1_L;
3926begin
3927 NotImplemented;
3928end;
3929
3930procedure TCpuZ80.BIT_1_HL_Indirect;
3931begin
3932 NotImplemented;
3933end;
3934
3935procedure TCpuZ80.BIT_1_A;
3936begin
3937 NotImplemented;
3938end;
3939
3940procedure TCpuZ80.BIT_2_B;
3941begin
3942 NotImplemented;
3943end;
3944
3945procedure TCpuZ80.BIT_2_C;
3946begin
3947 NotImplemented;
3948end;
3949
3950procedure TCpuZ80.BIT_2_D;
3951begin
3952 NotImplemented;
3953end;
3954
3955procedure TCpuZ80.BIT_2_E;
3956begin
3957 NotImplemented;
3958end;
3959
3960procedure TCpuZ80.BIT_2_H;
3961begin
3962 NotImplemented;
3963end;
3964
3965procedure TCpuZ80.BIT_2_L;
3966begin
3967 NotImplemented;
3968end;
3969
3970procedure TCpuZ80.BIT_2_HL_Indirect;
3971begin
3972 NotImplemented;
3973end;
3974
3975procedure TCpuZ80.BIT_2_A;
3976begin
3977 NotImplemented;
3978end;
3979
3980procedure TCpuZ80.BIT_3_B;
3981begin
3982 NotImplemented;
3983end;
3984
3985procedure TCpuZ80.BIT_3_C;
3986begin
3987 NotImplemented;
3988end;
3989
3990procedure TCpuZ80.BIT_3_D;
3991begin
3992 NotImplemented;
3993end;
3994
3995procedure TCpuZ80.BIT_3_E;
3996begin
3997 NotImplemented;
3998end;
3999
4000procedure TCpuZ80.BIT_3_H;
4001begin
4002 NotImplemented;
4003end;
4004
4005procedure TCpuZ80.BIT_3_L;
4006begin
4007 NotImplemented;
4008end;
4009
4010procedure TCpuZ80.BIT_3_HL_Indirect;
4011begin
4012 NotImplemented;
4013end;
4014
4015procedure TCpuZ80.BIT_3_A;
4016begin
4017 NotImplemented;
4018end;
4019
4020procedure TCpuZ80.BIT_4_B;
4021begin
4022 NotImplemented;
4023end;
4024
4025procedure TCpuZ80.BIT_4_C;
4026begin
4027 NotImplemented;
4028end;
4029
4030procedure TCpuZ80.BIT_4_D;
4031begin
4032 NotImplemented;
4033end;
4034
4035procedure TCpuZ80.BIT_4_E;
4036begin
4037 NotImplemented;
4038end;
4039
4040procedure TCpuZ80.BIT_4_H;
4041begin
4042 NotImplemented;
4043end;
4044
4045procedure TCpuZ80.BIT_4_L;
4046begin
4047 NotImplemented;
4048end;
4049
4050procedure TCpuZ80.BIT_4_HL_Indirect;
4051begin
4052 NotImplemented;
4053end;
4054
4055procedure TCpuZ80.BIT_4_A;
4056begin
4057 NotImplemented;
4058end;
4059
4060procedure TCpuZ80.BIT_5_B;
4061begin
4062 NotImplemented;
4063end;
4064
4065procedure TCpuZ80.BIT_5_C;
4066begin
4067 NotImplemented;
4068end;
4069
4070procedure TCpuZ80.BIT_5_D;
4071begin
4072 NotImplemented;
4073end;
4074
4075procedure TCpuZ80.BIT_5_E;
4076begin
4077 NotImplemented;
4078end;
4079
4080procedure TCpuZ80.BIT_5_H;
4081begin
4082 NotImplemented;
4083end;
4084
4085procedure TCpuZ80.BIT_5_L;
4086begin
4087 NotImplemented;
4088end;
4089
4090procedure TCpuZ80.BIT_5_HL_Indirect;
4091begin
4092 NotImplemented;
4093end;
4094
4095procedure TCpuZ80.BIT_5_A;
4096begin
4097 NotImplemented;
4098end;
4099
4100procedure TCpuZ80.BIT_6_B;
4101begin
4102 NotImplemented;
4103end;
4104
4105procedure TCpuZ80.BIT_6_C;
4106begin
4107 NotImplemented;
4108end;
4109
4110procedure TCpuZ80.BIT_6_D;
4111begin
4112 NotImplemented;
4113end;
4114
4115procedure TCpuZ80.BIT_6_E;
4116begin
4117 NotImplemented;
4118end;
4119
4120procedure TCpuZ80.BIT_6_H;
4121begin
4122 NotImplemented;
4123end;
4124
4125procedure TCpuZ80.BIT_6_L;
4126begin
4127 NotImplemented;
4128end;
4129
4130procedure TCpuZ80.BIT_6_HL_Indirect;
4131begin
4132 NotImplemented;
4133end;
4134
4135procedure TCpuZ80.BIT_6_A;
4136begin
4137 NotImplemented;
4138end;
4139
4140procedure TCpuZ80.BIT_7_B;
4141begin
4142 NotImplemented;
4143end;
4144
4145procedure TCpuZ80.BIT_7_C;
4146begin
4147 NotImplemented;
4148end;
4149
4150procedure TCpuZ80.BIT_7_D;
4151begin
4152 NotImplemented;
4153end;
4154
4155procedure TCpuZ80.BIT_7_E;
4156begin
4157 NotImplemented;
4158end;
4159
4160procedure TCpuZ80.BIT_7_H;
4161begin
4162 NotImplemented;
4163end;
4164
4165procedure TCpuZ80.BIT_7_L;
4166begin
4167 NotImplemented;
4168end;
4169
4170procedure TCpuZ80.BIT_7_HL_Indirect;
4171begin
4172 NotImplemented;
4173end;
4174
4175procedure TCpuZ80.BIT_7_A;
4176begin
4177 NotImplemented;
4178end;
4179
4180procedure TCpuZ80.RES_0_B;
4181begin
4182 NotImplemented;
4183end;
4184
4185procedure TCpuZ80.RES_0_C;
4186begin
4187 NotImplemented;
4188end;
4189
4190procedure TCpuZ80.RES_0_D;
4191begin
4192 NotImplemented;
4193end;
4194
4195procedure TCpuZ80.RES_0_E;
4196begin
4197 NotImplemented;
4198end;
4199
4200procedure TCpuZ80.RES_0_H;
4201begin
4202 NotImplemented;
4203end;
4204
4205procedure TCpuZ80.RES_0_L;
4206begin
4207 NotImplemented;
4208end;
4209
4210procedure TCpuZ80.RES_0_HL_Indirect;
4211begin
4212 NotImplemented;
4213end;
4214
4215procedure TCpuZ80.RES_0_A;
4216begin
4217 NotImplemented;
4218end;
4219
4220procedure TCpuZ80.RES_1_B;
4221begin
4222 NotImplemented;
4223end;
4224
4225procedure TCpuZ80.RES_1_C;
4226begin
4227 NotImplemented;
4228end;
4229
4230procedure TCpuZ80.RES_1_D;
4231begin
4232 NotImplemented;
4233end;
4234
4235procedure TCpuZ80.RES_1_E;
4236begin
4237 NotImplemented;
4238end;
4239
4240procedure TCpuZ80.RES_1_H;
4241begin
4242 NotImplemented;
4243end;
4244
4245procedure TCpuZ80.RES_1_L;
4246begin
4247 NotImplemented;
4248end;
4249
4250procedure TCpuZ80.RES_1_HL_Indirect;
4251begin
4252 NotImplemented;
4253end;
4254
4255procedure TCpuZ80.RES_1_A;
4256begin
4257 NotImplemented;
4258end;
4259
4260procedure TCpuZ80.RES_2_B;
4261begin
4262 NotImplemented;
4263end;
4264
4265procedure TCpuZ80.RES_2_C;
4266begin
4267 NotImplemented;
4268end;
4269
4270procedure TCpuZ80.RES_2_D;
4271begin
4272 NotImplemented;
4273end;
4274
4275procedure TCpuZ80.RES_2_E;
4276begin
4277 NotImplemented;
4278end;
4279
4280procedure TCpuZ80.RES_2_H;
4281begin
4282 NotImplemented;
4283end;
4284
4285procedure TCpuZ80.RES_2_L;
4286begin
4287 NotImplemented;
4288end;
4289
4290procedure TCpuZ80.RES_2_HL_Indirect;
4291begin
4292 NotImplemented;
4293end;
4294
4295procedure TCpuZ80.RES_2_A;
4296begin
4297 NotImplemented;
4298end;
4299
4300procedure TCpuZ80.RES_3_B;
4301begin
4302 NotImplemented;
4303end;
4304
4305procedure TCpuZ80.RES_3_C;
4306begin
4307 NotImplemented;
4308end;
4309
4310procedure TCpuZ80.RES_3_D;
4311begin
4312 NotImplemented;
4313end;
4314
4315procedure TCpuZ80.RES_3_E;
4316begin
4317 NotImplemented;
4318end;
4319
4320procedure TCpuZ80.RES_3_H;
4321begin
4322 NotImplemented;
4323end;
4324
4325procedure TCpuZ80.RES_3_L;
4326begin
4327 NotImplemented;
4328end;
4329
4330procedure TCpuZ80.RES_3_HL_Indirect;
4331begin
4332 NotImplemented;
4333end;
4334
4335procedure TCpuZ80.RES_3_A;
4336begin
4337 NotImplemented;
4338end;
4339
4340procedure TCpuZ80.RES_4_B;
4341begin
4342 NotImplemented;
4343end;
4344
4345procedure TCpuZ80.RES_4_C;
4346begin
4347 NotImplemented;
4348end;
4349
4350procedure TCpuZ80.RES_4_D;
4351begin
4352 NotImplemented;
4353end;
4354
4355procedure TCpuZ80.RES_4_E;
4356begin
4357 NotImplemented;
4358end;
4359
4360procedure TCpuZ80.RES_4_H;
4361begin
4362 NotImplemented;
4363end;
4364
4365procedure TCpuZ80.RES_4_L;
4366begin
4367 NotImplemented;
4368end;
4369
4370procedure TCpuZ80.RES_4_HL_Indirect;
4371begin
4372 NotImplemented;
4373end;
4374
4375procedure TCpuZ80.RES_4_A;
4376begin
4377 NotImplemented;
4378end;
4379
4380procedure TCpuZ80.RES_5_B;
4381begin
4382 NotImplemented;
4383end;
4384
4385procedure TCpuZ80.RES_5_C;
4386begin
4387 NotImplemented;
4388end;
4389
4390procedure TCpuZ80.RES_5_D;
4391begin
4392 NotImplemented;
4393end;
4394
4395procedure TCpuZ80.RES_5_E;
4396begin
4397 NotImplemented;
4398end;
4399
4400procedure TCpuZ80.RES_5_H;
4401begin
4402 NotImplemented;
4403end;
4404
4405procedure TCpuZ80.RES_5_L;
4406begin
4407 NotImplemented;
4408end;
4409
4410procedure TCpuZ80.RES_5_HL_Indirect;
4411begin
4412 NotImplemented;
4413end;
4414
4415procedure TCpuZ80.RES_5_A;
4416begin
4417 NotImplemented;
4418end;
4419
4420procedure TCpuZ80.RES_6_B;
4421begin
4422 NotImplemented;
4423end;
4424
4425procedure TCpuZ80.RES_6_C;
4426begin
4427 NotImplemented;
4428end;
4429
4430procedure TCpuZ80.RES_6_D;
4431begin
4432 NotImplemented;
4433end;
4434
4435procedure TCpuZ80.RES_6_E;
4436begin
4437 NotImplemented;
4438end;
4439
4440procedure TCpuZ80.RES_6_H;
4441begin
4442 NotImplemented;
4443end;
4444
4445procedure TCpuZ80.RES_6_L;
4446begin
4447 NotImplemented;
4448end;
4449
4450procedure TCpuZ80.RES_6_HL_Indirect;
4451begin
4452 NotImplemented;
4453end;
4454
4455procedure TCpuZ80.RES_6_A;
4456begin
4457 NotImplemented;
4458end;
4459
4460procedure TCpuZ80.RES_7_B;
4461begin
4462 NotImplemented;
4463end;
4464
4465procedure TCpuZ80.RES_7_C;
4466begin
4467 NotImplemented;
4468end;
4469
4470procedure TCpuZ80.RES_7_D;
4471begin
4472 NotImplemented;
4473end;
4474
4475procedure TCpuZ80.RES_7_E;
4476begin
4477 NotImplemented;
4478end;
4479
4480procedure TCpuZ80.RES_7_H;
4481begin
4482 NotImplemented;
4483end;
4484
4485procedure TCpuZ80.RES_7_L;
4486begin
4487 NotImplemented;
4488end;
4489
4490procedure TCpuZ80.RES_7_HL_Indirect;
4491begin
4492 NotImplemented;
4493end;
4494
4495procedure TCpuZ80.RES_7_A;
4496begin
4497 NotImplemented;
4498end;
4499
4500procedure TCpuZ80.SET_0_B;
4501begin
4502 NotImplemented;
4503end;
4504
4505procedure TCpuZ80.SET_0_C;
4506begin
4507 NotImplemented;
4508end;
4509
4510procedure TCpuZ80.SET_0_D;
4511begin
4512 NotImplemented;
4513end;
4514
4515procedure TCpuZ80.SET_0_E;
4516begin
4517 NotImplemented;
4518end;
4519
4520procedure TCpuZ80.SET_0_H;
4521begin
4522 NotImplemented;
4523end;
4524
4525procedure TCpuZ80.SET_0_L;
4526begin
4527 NotImplemented;
4528end;
4529
4530procedure TCpuZ80.SET_0_HL_Indirect;
4531begin
4532 NotImplemented;
4533end;
4534
4535procedure TCpuZ80.SET_0_A;
4536begin
4537 NotImplemented;
4538end;
4539
4540procedure TCpuZ80.SET_1_B;
4541begin
4542 NotImplemented;
4543end;
4544
4545procedure TCpuZ80.SET_1_C;
4546begin
4547 NotImplemented;
4548end;
4549
4550procedure TCpuZ80.SET_1_D;
4551begin
4552 NotImplemented;
4553end;
4554
4555procedure TCpuZ80.SET_1_E;
4556begin
4557 NotImplemented;
4558end;
4559
4560procedure TCpuZ80.SET_1_H;
4561begin
4562 NotImplemented;
4563end;
4564
4565procedure TCpuZ80.SET_1_L;
4566begin
4567 NotImplemented;
4568end;
4569
4570procedure TCpuZ80.SET_1_HL_Indirect;
4571begin
4572 NotImplemented;
4573end;
4574
4575procedure TCpuZ80.SET_1_A;
4576begin
4577 NotImplemented;
4578end;
4579
4580procedure TCpuZ80.SET_2_B;
4581begin
4582 NotImplemented;
4583end;
4584
4585procedure TCpuZ80.SET_2_C;
4586begin
4587 NotImplemented;
4588end;
4589
4590procedure TCpuZ80.SET_2_D;
4591begin
4592 NotImplemented;
4593end;
4594
4595procedure TCpuZ80.SET_2_E;
4596begin
4597 NotImplemented;
4598end;
4599
4600procedure TCpuZ80.SET_2_H;
4601begin
4602 NotImplemented;
4603end;
4604
4605procedure TCpuZ80.SET_2_L;
4606begin
4607 NotImplemented;
4608end;
4609
4610procedure TCpuZ80.SET_2_HL_Indirect;
4611begin
4612 NotImplemented;
4613end;
4614
4615procedure TCpuZ80.SET_2_A;
4616begin
4617 NotImplemented;
4618end;
4619
4620procedure TCpuZ80.SET_3_B;
4621begin
4622 NotImplemented;
4623end;
4624
4625procedure TCpuZ80.SET_3_C;
4626begin
4627 NotImplemented;
4628end;
4629
4630procedure TCpuZ80.SET_3_D;
4631begin
4632 NotImplemented;
4633end;
4634
4635procedure TCpuZ80.SET_3_E;
4636begin
4637 NotImplemented;
4638end;
4639
4640procedure TCpuZ80.SET_3_H;
4641begin
4642 NotImplemented;
4643end;
4644
4645procedure TCpuZ80.SET_3_L;
4646begin
4647 NotImplemented;
4648end;
4649
4650procedure TCpuZ80.SET_3_HL_Indirect;
4651begin
4652 NotImplemented;
4653end;
4654
4655procedure TCpuZ80.SET_3_A;
4656begin
4657 NotImplemented;
4658end;
4659
4660procedure TCpuZ80.SET_4_B;
4661begin
4662 NotImplemented;
4663end;
4664
4665procedure TCpuZ80.SET_4_C;
4666begin
4667 NotImplemented;
4668end;
4669
4670procedure TCpuZ80.SET_4_D;
4671begin
4672 NotImplemented;
4673end;
4674
4675procedure TCpuZ80.SET_4_E;
4676begin
4677 NotImplemented;
4678end;
4679
4680procedure TCpuZ80.SET_4_H;
4681begin
4682 NotImplemented;
4683end;
4684
4685procedure TCpuZ80.SET_4_L;
4686begin
4687 NotImplemented;
4688end;
4689
4690procedure TCpuZ80.SET_4_HL_Indirect;
4691begin
4692 NotImplemented;
4693end;
4694
4695procedure TCpuZ80.SET_4_A;
4696begin
4697 NotImplemented;
4698end;
4699
4700procedure TCpuZ80.SET_5_B;
4701begin
4702 NotImplemented;
4703end;
4704
4705procedure TCpuZ80.SET_5_C;
4706begin
4707 NotImplemented;
4708end;
4709
4710procedure TCpuZ80.SET_5_D;
4711begin
4712 NotImplemented;
4713end;
4714
4715procedure TCpuZ80.SET_5_E;
4716begin
4717 NotImplemented;
4718end;
4719
4720procedure TCpuZ80.SET_5_H;
4721begin
4722 NotImplemented;
4723end;
4724
4725procedure TCpuZ80.SET_5_L;
4726begin
4727 NotImplemented;
4728end;
4729
4730procedure TCpuZ80.SET_5_HL_Indirect;
4731begin
4732 NotImplemented;
4733end;
4734
4735procedure TCpuZ80.SET_5_A;
4736begin
4737 NotImplemented;
4738end;
4739
4740procedure TCpuZ80.SET_6_B;
4741begin
4742 NotImplemented;
4743end;
4744
4745procedure TCpuZ80.SET_6_C;
4746begin
4747 NotImplemented;
4748end;
4749
4750procedure TCpuZ80.SET_6_D;
4751begin
4752 NotImplemented;
4753end;
4754
4755procedure TCpuZ80.SET_6_E;
4756begin
4757 NotImplemented;
4758end;
4759
4760procedure TCpuZ80.SET_6_H;
4761begin
4762 NotImplemented;
4763end;
4764
4765procedure TCpuZ80.SET_6_L;
4766begin
4767 NotImplemented;
4768end;
4769
4770procedure TCpuZ80.SET_6_HL_Indirect;
4771begin
4772 NotImplemented;
4773end;
4774
4775procedure TCpuZ80.SET_6_A;
4776begin
4777 NotImplemented;
4778end;
4779
4780procedure TCpuZ80.SET_7_B;
4781begin
4782 NotImplemented;
4783end;
4784
4785procedure TCpuZ80.SET_7_C;
4786begin
4787 NotImplemented;
4788end;
4789
4790procedure TCpuZ80.SET_7_D;
4791begin
4792 NotImplemented;
4793end;
4794
4795procedure TCpuZ80.SET_7_E;
4796begin
4797 NotImplemented;
4798end;
4799
4800procedure TCpuZ80.SET_7_H;
4801begin
4802 NotImplemented;
4803end;
4804
4805procedure TCpuZ80.SET_7_L;
4806begin
4807 NotImplemented;
4808end;
4809
4810procedure TCpuZ80.SET_7_HL_Indirect;
4811begin
4812 NotImplemented;
4813end;
4814
4815procedure TCpuZ80.SET_7_A;
4816begin
4817 NotImplemented;
4818end;
4819
4820procedure TCpuZ80.ADD_IX_BC;
4821begin
4822 NotImplemented;
4823end;
4824
4825procedure TCpuZ80.ADD_IX_DE;
4826begin
4827 AddWord(IX, DE.Value);
4828end;
4829
4830procedure TCpuZ80.LD_IX_NN;
4831begin
4832 IX := ReadWord;
4833end;
4834
4835procedure TCpuZ80.LD_NN_Indirect_IX;
4836begin
4837 NotImplemented;
4838end;
4839
4840procedure TCpuZ80.INC_IX;
4841begin
4842 IncWord(IX);
4843end;
4844
4845procedure TCpuZ80.ADD_IX_IX;
4846begin
4847 AddWord(IX, IX);
4848end;
4849
4850procedure TCpuZ80.LD_IX_NN_Indirect;
4851begin
4852 NotImplemented;
4853end;
4854
4855procedure TCpuZ80.DEC_IX;
4856begin
4857 NotImplemented;
4858end;
4859
4860procedure TCpuZ80.INC_IX_Plus_D_Indirect;
4861begin
4862 NotImplemented;
4863end;
4864
4865procedure TCpuZ80.DEC_IX_Plus_D_Indirect;
4866begin
4867 NotImplemented;
4868end;
4869
4870procedure TCpuZ80.LD_IX_Plus_D_Indirect_N;
4871begin
4872 NotImplemented;
4873end;
4874
4875procedure TCpuZ80.ADD_IX_SP;
4876begin
4877 NotImplemented;
4878end;
4879
4880procedure TCpuZ80.LD_B_IX_Plus_D_Indirect;
4881begin
4882 NotImplemented;
4883end;
4884
4885procedure TCpuZ80.LD_C_IX_Plus_D_Indirect;
4886begin
4887 NotImplemented;
4888end;
4889
4890procedure TCpuZ80.LD_D_IX_Plus_D_Indirect;
4891begin
4892 NotImplemented;
4893end;
4894
4895procedure TCpuZ80.LD_E_IX_Plus_D_Indirect;
4896begin
4897 NotImplemented;
4898end;
4899
4900procedure TCpuZ80.LD_H_IX_Plus_D_Indirect;
4901begin
4902 NotImplemented;
4903end;
4904
4905procedure TCpuZ80.LD_L_IX_Plus_D_Indirect;
4906begin
4907 NotImplemented;
4908end;
4909
4910procedure TCpuZ80.LD_IX_Plus_D_Indirect_B;
4911begin
4912 NotImplemented;
4913end;
4914
4915procedure TCpuZ80.LD_IX_Plus_D_Indirect_C;
4916begin
4917 NotImplemented;
4918end;
4919
4920procedure TCpuZ80.LD_IX_Plus_D_Indirect_D;
4921begin
4922 NotImplemented;
4923end;
4924
4925procedure TCpuZ80.LD_IX_Plus_D_Indirect_E;
4926begin
4927 NotImplemented;
4928end;
4929
4930procedure TCpuZ80.LD_IX_Plus_D_Indirect_H;
4931begin
4932 NotImplemented;
4933end;
4934
4935procedure TCpuZ80.LD_IX_Plus_D_Indirect_L;
4936begin
4937 NotImplemented;
4938end;
4939
4940procedure TCpuZ80.LD_IX_Plus_D_Indirect_A;
4941begin
4942 NotImplemented;
4943end;
4944
4945procedure TCpuZ80.LD_A_IX_Plus_D_Indirect;
4946begin
4947 NotImplemented;
4948end;
4949
4950procedure TCpuZ80.ADD_A_IX_Plus_D_Indirect;
4951begin
4952 NotImplemented;
4953end;
4954
4955procedure TCpuZ80.ADC_A_IX_Plus_D_Indirect;
4956begin
4957 NotImplemented;
4958end;
4959
4960procedure TCpuZ80.SUB_IX_Plus_D_Indirect;
4961begin
4962 NotImplemented;
4963end;
4964
4965procedure TCpuZ80.SBC_A_IX_Plus_D_Indirect;
4966begin
4967 NotImplemented;
4968end;
4969
4970procedure TCpuZ80.AND_IX_Plus_D_Indirect;
4971begin
4972 NotImplemented;
4973end;
4974
4975procedure TCpuZ80.XOR_IX_Plus_D_Indirect;
4976begin
4977 NotImplemented;
4978end;
4979
4980procedure TCpuZ80.OR_IX_Plus_D_Indirect;
4981begin
4982 NotImplemented;
4983end;
4984
4985procedure TCpuZ80.CP_IX_Plus_D_Indirect;
4986begin
4987 NotImplemented;
4988end;
4989
4990procedure TCpuZ80.POP_IX;
4991begin
4992 NotImplemented;
4993end;
4994
4995procedure TCpuZ80.EX_SP_Indirect_IX;
4996begin
4997 NotImplemented;
4998end;
4999
5000procedure TCpuZ80.PUSH_IX;
5001begin
5002 NotImplemented;
5003end;
5004
5005procedure TCpuZ80.JP_IX_Indirect;
5006begin
5007 NotImplemented;
5008end;
5009
5010procedure TCpuZ80.LD_SP_IX;
5011begin
5012 NotImplemented;
5013end;
5014
5015procedure TCpuZ80.RLC_IX_Plus_D_Indirect;
5016begin
5017 NotImplemented;
5018end;
5019
5020procedure TCpuZ80.RRC_IX_Plus_D_Indirect;
5021begin
5022 NotImplemented;
5023end;
5024
5025procedure TCpuZ80.RL_IX_Plus_D_Indirect;
5026begin
5027 NotImplemented;
5028end;
5029
5030procedure TCpuZ80.RR_IX_Plus_D_Indirect;
5031begin
5032 NotImplemented;
5033end;
5034
5035procedure TCpuZ80.SLA_IX_Plus_D_Indirect;
5036begin
5037 NotImplemented;
5038end;
5039
5040procedure TCpuZ80.SRA_IX_Plus_D_Indirect;
5041begin
5042 NotImplemented;
5043end;
5044
5045procedure TCpuZ80.SRL_IX_Plus_D_Indirect;
5046begin
5047 NotImplemented;
5048end;
5049
5050procedure TCpuZ80.BIT_0_IX_Plus_D_Indirect;
5051begin
5052 NotImplemented;
5053end;
5054
5055procedure TCpuZ80.BIT_1_IX_Plus_D_Indirect;
5056begin
5057 NotImplemented;
5058end;
5059
5060procedure TCpuZ80.BIT_2_IX_Plus_D_Indirect;
5061begin
5062 NotImplemented;
5063end;
5064
5065procedure TCpuZ80.BIT_3_IX_Plus_D_Indirect;
5066begin
5067 NotImplemented;
5068end;
5069
5070procedure TCpuZ80.BIT_4_IX_Plus_D_Indirect;
5071begin
5072 NotImplemented;
5073end;
5074
5075procedure TCpuZ80.BIT_5_IX_Plus_D_Indirect;
5076begin
5077 NotImplemented;
5078end;
5079
5080procedure TCpuZ80.BIT_6_IX_Plus_D_Indirect;
5081begin
5082 NotImplemented;
5083end;
5084
5085procedure TCpuZ80.BIT_7_IX_Plus_D_Indirect;
5086begin
5087 NotImplemented;
5088end;
5089
5090procedure TCpuZ80.RES_0_IX_Plus_D_Indirect;
5091begin
5092 NotImplemented;
5093end;
5094
5095procedure TCpuZ80.RES_1_IX_Plus_D_Indirect;
5096begin
5097 NotImplemented;
5098end;
5099
5100procedure TCpuZ80.RES_2_IX_Plus_D_Indirect;
5101begin
5102 NotImplemented;
5103end;
5104
5105procedure TCpuZ80.RES_3_IX_Plus_D_Indirect;
5106begin
5107 NotImplemented;
5108end;
5109
5110procedure TCpuZ80.RES_4_IX_Plus_D_Indirect;
5111begin
5112 NotImplemented;
5113end;
5114
5115procedure TCpuZ80.RES_5_IX_Plus_D_Indirect;
5116begin
5117 NotImplemented;
5118end;
5119
5120procedure TCpuZ80.RES_6_IX_Plus_D_Indirect;
5121begin
5122 NotImplemented;
5123end;
5124
5125procedure TCpuZ80.RES_7_IX_Plus_D_Indirect;
5126begin
5127 NotImplemented;
5128end;
5129
5130procedure TCpuZ80.SET_0_IX_Plus_D_Indirect;
5131begin
5132 NotImplemented;
5133end;
5134
5135procedure TCpuZ80.SET_1_IX_Plus_D_Indirect;
5136begin
5137 NotImplemented;
5138end;
5139
5140procedure TCpuZ80.SET_2_IX_Plus_D_Indirect;
5141begin
5142 NotImplemented;
5143end;
5144
5145procedure TCpuZ80.SET_3_IX_Plus_D_Indirect;
5146begin
5147 NotImplemented;
5148end;
5149
5150procedure TCpuZ80.SET_4_IX_Plus_D_Indirect;
5151begin
5152 NotImplemented;
5153end;
5154
5155procedure TCpuZ80.SET_5_IX_Plus_D_Indirect;
5156begin
5157 NotImplemented;
5158end;
5159
5160procedure TCpuZ80.SET_6_IX_Plus_D_Indirect;
5161begin
5162 NotImplemented;
5163end;
5164
5165procedure TCpuZ80.SET_7_IX_Plus_D_Indirect;
5166begin
5167 NotImplemented;
5168end;
5169
5170procedure TCpuZ80.ADD_IY_BC;
5171begin
5172 NotImplemented;
5173end;
5174
5175procedure TCpuZ80.ADD_IY_DE;
5176begin
5177 NotImplemented;
5178end;
5179
5180procedure TCpuZ80.LD_IY_NN;
5181begin
5182 NotImplemented;
5183end;
5184
5185procedure TCpuZ80.LD_NN_Indirect_IY;
5186begin
5187 NotImplemented;
5188end;
5189
5190procedure TCpuZ80.INC_IY;
5191begin
5192 NotImplemented;
5193end;
5194
5195procedure TCpuZ80.ADD_IY_IY;
5196begin
5197 NotImplemented;
5198end;
5199
5200procedure TCpuZ80.LD_IY_NN_Indirect;
5201begin
5202 NotImplemented;
5203end;
5204
5205procedure TCpuZ80.DEC_IY;
5206begin
5207 NotImplemented;
5208end;
5209
5210procedure TCpuZ80.INC_IY_Plus_D_Indirect;
5211begin
5212 NotImplemented;
5213end;
5214
5215procedure TCpuZ80.DEC_IY_Plus_D_Indirect;
5216begin
5217 NotImplemented;
5218end;
5219
5220procedure TCpuZ80.LD_IY_Plus_D_Indirect_N;
5221begin
5222 NotImplemented;
5223end;
5224
5225procedure TCpuZ80.ADD_IY_SP;
5226begin
5227 NotImplemented;
5228end;
5229
5230procedure TCpuZ80.LD_B_IY_Plus_D_Indirect;
5231begin
5232 NotImplemented;
5233end;
5234
5235procedure TCpuZ80.LD_C_IY_Plus_D_Indirect;
5236begin
5237 NotImplemented;
5238end;
5239
5240procedure TCpuZ80.LD_D_IY_Plus_D_Indirect;
5241begin
5242 NotImplemented;
5243end;
5244
5245procedure TCpuZ80.LD_E_IY_Plus_D_Indirect;
5246begin
5247 NotImplemented;
5248end;
5249
5250procedure TCpuZ80.LD_H_IY_Plus_D_Indirect;
5251begin
5252 NotImplemented;
5253end;
5254
5255procedure TCpuZ80.LD_L_IY_Plus_D_Indirect;
5256begin
5257 NotImplemented;
5258end;
5259
5260procedure TCpuZ80.LD_IY_Plus_D_Indirect_B;
5261begin
5262 NotImplemented;
5263end;
5264
5265procedure TCpuZ80.LD_IY_Plus_D_Indirect_C;
5266begin
5267 NotImplemented;
5268end;
5269
5270procedure TCpuZ80.LD_IY_Plus_D_Indirect_D;
5271begin
5272 NotImplemented;
5273end;
5274
5275procedure TCpuZ80.LD_IY_Plus_D_Indirect_E;
5276begin
5277 NotImplemented;
5278end;
5279
5280procedure TCpuZ80.LD_IY_Plus_D_Indirect_H;
5281begin
5282 NotImplemented;
5283end;
5284
5285procedure TCpuZ80.LD_IY_Plus_D_Indirect_L;
5286begin
5287 NotImplemented;
5288end;
5289
5290procedure TCpuZ80.LD_IY_Plus_D_Indirect_A;
5291begin
5292 NotImplemented;
5293end;
5294
5295procedure TCpuZ80.LD_A_IY_Plus_D_Indirect;
5296begin
5297 NotImplemented;
5298end;
5299
5300procedure TCpuZ80.ADD_A_IY_Plus_D_Indirect;
5301begin
5302 NotImplemented;
5303end;
5304
5305procedure TCpuZ80.ADC_A_IY_Plus_D_Indirect;
5306begin
5307 NotImplemented;
5308end;
5309
5310procedure TCpuZ80.SUB_IY_Plus_D_Indirect;
5311begin
5312 NotImplemented;
5313end;
5314
5315procedure TCpuZ80.SBC_A_IY_Plus_D_Indirect;
5316begin
5317 NotImplemented;
5318end;
5319
5320procedure TCpuZ80.AND_IY_Plus_D_Indirect;
5321begin
5322 NotImplemented;
5323end;
5324
5325procedure TCpuZ80.XOR_IY_Plus_D_Indirect;
5326begin
5327 NotImplemented;
5328end;
5329
5330procedure TCpuZ80.OR_IY_Plus_D_Indirect;
5331begin
5332 NotImplemented;
5333end;
5334
5335procedure TCpuZ80.CP_IY_Plus_D_Indirect;
5336begin
5337 NotImplemented;
5338end;
5339
5340procedure TCpuZ80.POP_IY;
5341begin
5342 NotImplemented;
5343end;
5344
5345procedure TCpuZ80.EX_SP_Indirect_IY;
5346begin
5347 NotImplemented;
5348end;
5349
5350procedure TCpuZ80.PUSH_IY;
5351begin
5352 NotImplemented;
5353end;
5354
5355procedure TCpuZ80.JP_IY_Indirect;
5356begin
5357 NotImplemented;
5358end;
5359
5360procedure TCpuZ80.LD_SP_IY;
5361begin
5362 NotImplemented;
5363end;
5364
5365procedure TCpuZ80.RLC_IY_Plus_D_Indirect;
5366begin
5367 NotImplemented;
5368end;
5369
5370procedure TCpuZ80.RRC_IY_Plus_D_Indirect;
5371begin
5372 NotImplemented;
5373end;
5374
5375procedure TCpuZ80.RL_IY_Plus_D_Indirect;
5376begin
5377 NotImplemented;
5378end;
5379
5380procedure TCpuZ80.RR_IY_Plus_D_Indirect;
5381begin
5382 NotImplemented;
5383end;
5384
5385procedure TCpuZ80.SLA_IY_Plus_D_Indirect;
5386begin
5387 NotImplemented;
5388end;
5389
5390procedure TCpuZ80.SRA_IY_Plus_D_Indirect;
5391begin
5392 NotImplemented;
5393end;
5394
5395procedure TCpuZ80.SRL_IY_Plus_D_Indirect;
5396begin
5397 NotImplemented;
5398end;
5399
5400procedure TCpuZ80.BIT_0_IY_Plus_D_Indirect;
5401begin
5402 NotImplemented;
5403end;
5404
5405procedure TCpuZ80.BIT_1_IY_Plus_D_Indirect;
5406begin
5407 NotImplemented;
5408end;
5409
5410procedure TCpuZ80.BIT_2_IY_Plus_D_Indirect;
5411begin
5412 NotImplemented;
5413end;
5414
5415procedure TCpuZ80.BIT_3_IY_Plus_D_Indirect;
5416begin
5417 NotImplemented;
5418end;
5419
5420procedure TCpuZ80.BIT_4_IY_Plus_D_Indirect;
5421begin
5422 NotImplemented;
5423end;
5424
5425procedure TCpuZ80.BIT_5_IY_Plus_D_Indirect;
5426begin
5427 NotImplemented;
5428end;
5429
5430procedure TCpuZ80.BIT_6_IY_Plus_D_Indirect;
5431begin
5432 NotImplemented;
5433end;
5434
5435procedure TCpuZ80.BIT_7_IY_Plus_D_Indirect;
5436begin
5437 NotImplemented;
5438end;
5439
5440procedure TCpuZ80.RES_0_IY_Plus_D_Indirect;
5441begin
5442 NotImplemented;
5443end;
5444
5445procedure TCpuZ80.RES_1_IY_Plus_D_Indirect;
5446begin
5447 NotImplemented;
5448end;
5449
5450procedure TCpuZ80.RES_2_IY_Plus_D_Indirect;
5451begin
5452 NotImplemented;
5453end;
5454
5455procedure TCpuZ80.RES_3_IY_Plus_D_Indirect;
5456begin
5457 NotImplemented;
5458end;
5459
5460procedure TCpuZ80.RES_4_IY_Plus_D_Indirect;
5461begin
5462 NotImplemented;
5463end;
5464
5465procedure TCpuZ80.RES_5_IY_Plus_D_Indirect;
5466begin
5467 NotImplemented;
5468end;
5469
5470procedure TCpuZ80.RES_6_IY_Plus_D_Indirect;
5471begin
5472 NotImplemented;
5473end;
5474
5475procedure TCpuZ80.RES_7_IY_Plus_D_Indirect;
5476begin
5477 NotImplemented;
5478end;
5479
5480procedure TCpuZ80.SET_0_IY_Plus_D_Indirect;
5481begin
5482 NotImplemented;
5483end;
5484
5485procedure TCpuZ80.SET_1_IY_Plus_D_Indirect;
5486begin
5487 NotImplemented;
5488end;
5489
5490procedure TCpuZ80.SET_2_IY_Plus_D_Indirect;
5491begin
5492 NotImplemented;
5493end;
5494
5495procedure TCpuZ80.SET_3_IY_Plus_D_Indirect;
5496begin
5497 NotImplemented;
5498end;
5499
5500procedure TCpuZ80.SET_4_IY_Plus_D_Indirect;
5501begin
5502 NotImplemented;
5503end;
5504
5505procedure TCpuZ80.SET_5_IY_Plus_D_Indirect;
5506begin
5507 NotImplemented;
5508end;
5509
5510procedure TCpuZ80.SET_6_IY_Plus_D_Indirect;
5511begin
5512 NotImplemented;
5513end;
5514
5515procedure TCpuZ80.SET_7_IY_Plus_D_Indirect;
5516begin
5517 NotImplemented;
5518end;
5519
5520procedure TCpuZ80.Step;
5521var
5522 Opcode: Byte;
5523 Proc: TBaseEvent;
5524begin
5525 InstructionAddress := PC;
5526 Opcode := ReadByte;
5527 if Opcode = $CB then begin
5528 Opcode := ReadByte;
5529 Instruction := TInstruction($100 or ReadByte);
5530 end
5531 else if Opcode = $DD then begin
5532 Opcode := ReadByte;
5533 if Opcode = $CB then begin
5534 Opcode := ReadByte;
5535 Instruction := TInstruction($500 or Opcode);
5536 end else Instruction := TInstruction($200 or Opcode);
5537 end
5538 else if Opcode = $ED then begin
5539 Opcode := ReadByte;
5540 Instruction := TInstruction($300 or Opcode);
5541 end
5542 else if Opcode = $FD then begin
5543 Opcode := ReadByte;
5544 if Opcode = $CB then begin
5545 Opcode := ReadByte;
5546 Instruction := TInstruction($600 or Opcode);
5547 end else Instruction := TInstruction($400 or Opcode);
5548 end
5549 else Instruction := TInstruction(Opcode);
5550
5551 Proc := Instructions[Instruction];
5552 if Assigned(Proc) then Proc
5553 else begin
5554 Error('Unsupported instruction ' + IntToHex(Word(Instruction), 4));
5555 end;
5556 Ticks := Cardinal(Ticks + 1);
5557 DoOnStep;
5558end;
5559
5560procedure TCpuZ80.Reset;
5561begin
5562 PC := 0;
5563 SP := 0;
5564 IX := 0;
5565 IY := 0;
5566 AF.Value := 0;
5567 BC.Value := 0;
5568 DE.Value := 0;
5569 HL.Value := 0;
5570 InterruptEnabled := True;
5571 InterruptMode := 0;
5572 Ticks := 0;
5573end;
5574
5575constructor TCpuZ80.Create;
5576begin
5577 FRunning := False;
5578 FPaused := False;
5579 FEvent := TEvent.Create(nil, True, True, '');
5580 InitInstructions;
5581 Reset;
5582end;
5583
5584destructor TCpuZ80.Destroy;
5585begin
5586 Running := False;
5587 FreeAndNil(FEvent);
5588 inherited;
5589end;
5590
5591end.
5592
Note: See TracBrowser for help on using the repository browser.