Changeset 166

Timestamp:

Aug 9, 2018, 10:49:33 AM (6 years ago)

Author:

chronos

Message:

• Added: Support for more instructions.

Location:

branches/virtcpu fixed int

Files:

• UMachine.pas (modified) (15 diffs)
• virtcpu.lpi (modified) (1 diff)

branches/virtcpu fixed int/UMachine.pas

@@ -5 +5 @@
 {$DEFINE EXT_ARITHMETIC}
 {$DEFINE EXT_CONDITIONAL}
-{$DEFINE EXT_LOGICAL}
-{$DEFINE EXT_STACK}
-{$DEFINE EXT_SUBROUTINE}
-{$DEFINE EXT_SHIFT}
+//{$DEFINE EXT_LOGICAL}
+//{$DEFINE EXT_STACK}
+//{$DEFINE EXT_SUBROUTINE}
+//{$DEFINE EXT_ROTATION}
+//{$DEFINE EXT_MULTIPLICATION}
+//{$DEFINE EXT_SHIFT}
 //{$DEFINE EXT_BLOCK}
-{$DEFINE EXT_GENERAL}
+//{$DEFINE EXT_GENERAL}
 //{$DEFINE EXT_BIT}
 //{$DEFINE EXT_REL_JUMP}
@@ -18 +20 @@
 {$DEFINE EXT_STACK}
 {$ENDIF}
+{$IFDEF EXT_MULTIPLICATION}
+{$DEFINE EXT_ARITHMETIC}
+{$ENDIF}
 
 
@@ -30 +35 @@
   T = Integer;
 
-  TOpcode = (opNop, opLoad, opHalt, opLoadConst, opLoadMem, opStoreMem, opNeg,
+  TOpcode = (opNop, opLoad, opLoadConst, opNeg,
     opJump, {$IFDEF EXT_REL_JUMP}opJumpRel,{$ENDIF}
     opInc, opDec,
+    {$IFDEF EXT_MEMORY}opLoadMem, opStoreMem,{$ENDIF}
     {$IFDEF EXT_ARITHMETIC}opAdd, opSub,{$ENDIF}
     {$IFDEF EXT_IO}opInput, opOutput,{$ENDIF}
@@ -41 +47 @@
     {$IFDEF EXT_LOGICAL}opAnd, opOr, opXor,{$ENDIF}
     {$IFDEF EXT_SHIFT}opShl, opShr,{$ENDIF}
+    {$IFDEF EXT_ROTATION}opRor, opRol,{$ENDIF}
     {$IFDEF EXT_STACK}opPush, opPop,{$ENDIF}
     {$IFDEF EXT_CONDITIONAL}
-    opJumpRelCond, opJumpCond, opTestEqual, opTestNotEqual, opTestLess,
-    opTestLessEqual, opGreater, opGreaterEqual
-    {$ENDIF}
+    {$IFDEF EXT_REL_JUMP}opJumpRelCond,{$ENDIF}
+    opJumpCond, opTestEqual, opTestNotEqual, opTestLess,
+    opTestLessEqual, opTestGreater, opTestGreaterEqual,
+    {$ENDIF}
+    {$IFDEF EXT_MULTIPLICATION}
+    opMul, opDiv,
+    {$ENDIF}
+    opHalt
   );
 
@@ -65 +77 @@
     procedure OpcodeLoadConst;
     procedure OpcodeJump;
+    {$IFDEF EXT_REL_JUMP}
     procedure OpcodeJumpRel;
+    {$ENDIF}
     procedure OpcodeNeg;
     procedure OpcodeInc;
@@ -92 +106 @@
     procedure OpcodeShr;
     {$ENDIF}
+    {$IFDEF EXT_ROTATION}
+    procedure OpcodeRor;
+    procedure OpcodeRol;
+    {$ENDIF}
     {$IFDEF EXT_LOGICAL}
     procedure OpcodeAnd;
@@ -103 +121 @@
     {$IFDEF EXT_SUBROUTINE}
     procedure OpcodeCall;
+    procedure OpcodeReturn;
     {$IFDEF EXT_REL_JUMP}
     procedure OpcodeCallRel;
     {$ENDIF}
-    procedure OpcodeReturn;
     {$ENDIF}
     {$IFDEF EXT_IO}
@@ -115 +133 @@
     procedure OpcodeAdd;
     procedure OpcodeSub;
+    {$ENDIF}
+    {$IFDEF EXT_MULTIPLICATION}
+    procedure OpcodeMul;
+    procedure OpcodeDiv;
     {$ENDIF}
   public
@@ -224 +246 @@
 end;
 
+{$IFDEF EXT_REL_JUMP}
 procedure TCPU.OpcodeJumpRel;
 begin
   IP := IP + ReadNext;
 end;
+{$ENDIF}
 
 {$IFDEF EXT_CONDITIONAL}
@@ -265 +289 @@
 end;
 
+
 {$IFDEF EXT_REL_JUMP}
 procedure TCPU.OpcodeJumpRelCond;
@@ -271 +296 @@
 end;
 {$ENDIF}
+{$ENDIF}
+
+{$IFDEF EXT_ROTATION}
+procedure TCPU.OpcodeRor;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := (Registers[P1] shr Registers[P2]) or
+    ((Registers[P1] and ((1 shl Registers[P2]) - 1)) shl (SizeOf(T) * 8 - Registers[P2]));
+end;
+
+procedure TCPU.OpcodeRol;
+var
+  P1, P2: T;
+begin
+  P1 := ReadNext;
+  P2 := ReadNext;
+  Registers[P1] := (Registers[P1] shl Registers[P2]) or
+    ((Registers[P1] shr (SizeOf(T) * 8 - Registers[P2])) and ((1 shl Registers[P2]) - 1));
+end;
 {$ENDIF}
 
@@ -425 +472 @@
   R2 := ReadNext;
   Registers[R1] := Registers[R1] - Registers[R2];
+end;
+{$ENDIF}
+
+{$IFDEF EXT_MULTIPLICATION}
+procedure TCPU.OpcodeMul;
+var
+  R1: T;
+  R2: T;
+begin
+  R1 := ReadNext;
+  R2 := ReadNext;
+  Registers[R1] := Registers[R1] * Registers[R2];
+end;
+
+procedure TCPU.OpcodeDiv;
+var
+  R1: T;
+  R2: T;
+begin
+  R1 := ReadNext;
+  R2 := ReadNext;
+  Registers[R1] := Registers[R1] div Registers[R2];
 end;
 {$ENDIF}
@@ -461 +530 @@
   OpcodeHandlers[opNeg] := OpcodeNeg;
   OpcodeHandlers[opJump] := OpcodeJump;
+  OpcodeHandlers[opInc] := OpcodeInc;
+  OpcodeHandlers[opDec] := OpcodeDec;
   {$IFDEF EXT_REL_JUMP}
   OpcodeHandlers[opJumpRel] := OpcodeJumpRel;
@@ -491 +562 @@
   OpcodeHandlers[opRet] := OpcodeReturn;
   {$ENDIF}
+  {$IFDEF EXT_ROTATION}
+  OpcodeHandlers[opRor] := OpcodeRor;
+  OpcodeHandlers[opRol] := OpcodeRol;
+  {$ENDIF}
   {$IFDEF EXT_IO}
   OpcodeHandlers[opInput] := OpcodeInput;
   OpcodeHandlers[opOutput] := OpcodeOutput;
   {$ENDIF}
-  OpcodeHandlers[opInc] := OpcodeInc;
-  OpcodeHandlers[opDec] := OpcodeDec;
   {$IFDEF EXT_ARITHMETIC}
   OpcodeHandlers[opAdd] := OpcodeAdd;
   OpcodeHandlers[opSub] := OpcodeSub;
   {$ENDIF}
-  {$IFDEF EXT_ARITHMETIC}
+  {$IFDEF EXT_CONDITIONAL}
   OpcodeHandlers[opJumpCond] := OpcodeJumpCond;
   {$IFDEF EXT_REL_JUMP}
@@ -510 +583 @@
   OpcodeHandlers[opTestLess] := OpcodeTestLess;
   OpcodeHandlers[opTestLessEqual] := OpcodeTestLessEqual;
-  OpcodeHandlers[opGreater] := OpcodeTestGreat;
-  OpcodeHandlers[opGreaterEqual] := OpcodeTestGreatEqual;
+  OpcodeHandlers[opTestGreater] := OpcodeTestGreat;
+  OpcodeHandlers[opTestGreaterEqual] := OpcodeTestGreatEqual;
+  {$ENDIF}
+  {$IFDEF EXT_MULTIPLICATION}
+  OpcodeHandlers[opMul] := OpcodeMul;
+  OpcodeHandlers[opDiv] := OpcodeDiv;
   {$ENDIF}
 end;

branches/virtcpu fixed int/virtcpu.lpi

@@ -40 +40 @@
           </CodeGeneration>
           <Linking>
-            <Debugging>
-              <GenerateDebugInfo Value="False"/>
-            </Debugging>
             <LinkSmart Value="True"/>
             <Options>